Subject: [PATCH v3 2/2] i2c: New bus driver for the Qualcomm QUP I2C controller

From: [email-masked] (Ivan T. Ivanov)
Date: Mon, 24 Feb 2014 12:33:10 +0200

Hi, 

On Fri, 2014-02-21 at 09:35 -0600, Kumar Gala wrote: 
> On Feb 20, 2014, at 6:38 PM, Bjorn Andersson <[email-masked]> wrote:
> 
> > This bus driver supports the QUP i2c hardware controller in the Qualcomm SOCs.
> > The Qualcomm Universal Peripheral Engine (QUP) is a general purpose data path
> > engine with input/output FIFOs and an embedded i2c mini-core. The driver
> > supports FIFO mode (for low bandwidth applications) and block mode (interrupt
> > generated for each block-size data transfer).
> > 
> > Cc: Andy Gross <[email-masked]>
> > Cc: Stephen Boyd <[email-masked]>
> > Signed-off-by: Ivan T. Ivanov <[email-masked]>
> > Signed-off-by: Bjorn Andersson <[email-masked]>
> > ---

<snip>

> > 
> > +config I2C_QUP
> > +	tristate "Qualcomm QUP based I2C controller"
> > +	depends on ARCH_MSM
> 
> ARCH_QCOM

There is no such symbol, still.

Regards,
Ivan 

> - k