From: scottwood@freescale•com (Scott Wood)
To: linux-arm-kernel@lists•infradead.org
Subject: [RFC][PATCH 2/2] crypto: caam - handle core endianness != caam endianness
Date: Mon, 31 Aug 2015 19:49:51 -0500 [thread overview]
Message-ID: <1441068591.4966.47.camel@freescale.com> (raw)
In-Reply-To: <1440762608-7866-1-git-send-email-horia.geanta@freescale.com>
On Fri, 2015-08-28 at 14:50 +0300, Horia Geant? wrote:
>
> -#ifdef __BIG_ENDIAN
> -#define wr_reg32(reg, data) out_be32(reg, data)
> -#define rd_reg32(reg) in_be32(reg)
> +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_LE
> +#define caam16_to_cpu(value) le16_to_cpu(value)
> +#define cpu_to_caam16(value) cpu_to_le16(value)
> +#define caam32_to_cpu(value) le32_to_cpu(value)
> +#define cpu_to_caam32(value) cpu_to_le32(value)
> +#define caam64_to_cpu(value) le64_to_cpu(value)
> +#define cpu_to_caam64(value) cpu_to_le64(value)
What if we want to build a kernel that supports a chip with an LE CAAM and
another chip with a BE CAAM (e.g. ls1043a plus ls2080a)? This information
needs to come at runtime.
> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
> +#ifdef CONFIG_SOC_IMX7D
Likewise, why is there an ifdef for a particular SoC type?
-Scott
next prev parent reply other threads:[~2015-09-01 0:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-28 11:45 [RFC][PATCH 0/2] crypto: caam - Revamp I/O accessors Horia Geantă
2015-08-28 11:49 ` [RFC][PATCH 1/2] arm64: add ioread64be and iowrite64be macros Horia Geantă
2015-09-02 10:38 ` Will Deacon
2015-08-28 11:50 ` [RFC][PATCH 2/2] crypto: caam - handle core endianness != caam endianness Horia Geantă
2015-09-01 0:49 ` Scott Wood [this message]
2015-09-02 6:25 ` Porosanu Alexandru
2015-09-02 22:33 ` Scott Wood
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