Re: [PATCH v6 2/7] drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701

From: CK Hu <ck.hu@mediatek•com>
To: Jitao Shi <jitao.shi@mediatek•com>
Cc: Mark Rutland <mark.rutland@arm•com>,
	devicetree@vger•kernel.org, David Airlie <airlied@linux•ie>,
	stonea168@163•com, dri-devel@lists•freedesktop.org,
	yingjoe.chen@mediatek•com, Ajay Kumar <ajaykumar.rs@samsung•com>,
	Vincent Palatin <vpalatin@chromium•org>,
	cawa.cheng@mediatek•com, bibby.hsieh@mediatek•com,
	Russell King <rmk+kernel@arm•linux.org.uk>,
	Thierry Reding <treding@nvidia•com>,
	linux-pwm@vger•kernel.org, Sascha Hauer <kernel@pengutronix•de>,
	Pawel Moll <pawel.moll@arm•com>,
	Ian Campbell <ijc+devicetree@hellion•org.uk>,
	Inki Dae <inki.dae@samsung•com>, Rob Herring <robh+dt@kernel•org>,
	linux-mediatek@lists•infradead.org,
	Andy Yan <andy.yan@rock-chips•com>,
	Matthias Brugger <matthias.bgg@gmail•com>,
	eddie.huang@mediatek•com, linux-arm-kernel@lists•infradead.org,
	Rahul Sharma <rahul.sharma@samsung•com>,
	srv_heupstream@mediatek•com, linux-kernel@vger•kernel.org,
	Philipp Zabel <p.zabel@pengutronix•de>,
	Sean Paul <seanpaul@chromium•org>
Subject: Re: [PATCH v6 2/7] drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701
Date: Mon, 12 Aug 2019 16:40:41 +0800	[thread overview]
Message-ID: <1565599241.3510.0.camel@mtksdaap41> (raw)
In-Reply-To: <20190811104008.53372-3-jitao.shi@mediatek.com>

Hi, Jitao:

On Sun, 2019-08-11 at 18:40 +0800, Jitao Shi wrote:
> Config the different CMDQ reg address in driver data.
> 
> Signed-off-by: Jitao Shi <jitao.shi@mediatek•com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dsi.c | 29 ++++++++++++++++++++++++-----
>  1 file changed, 24 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 52b49daeed9f..ac8e80e379f7 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -123,7 +123,6 @@
>  #define VM_CMD_EN			BIT(0)
>  #define TS_VFP_EN			BIT(5)
>  
> -#define DSI_CMDQ0		0x180
>  #define CONFIG				(0xff << 0)
>  #define SHORT_PACKET			0
>  #define LONG_PACKET			2
> @@ -148,6 +147,10 @@
>  
>  struct phy;
>  
> +struct mtk_dsi_driver_data {
> +	const u32 reg_cmdq_off;
> +};
> +
>  struct mtk_dsi {
>  	struct mtk_ddp_comp ddp_comp;
>  	struct device *dev;
> @@ -174,6 +177,7 @@ struct mtk_dsi {
>  	bool enabled;
>  	u32 irq_data;
>  	wait_queue_head_t irq_wait_queue;
> +	const struct mtk_dsi_driver_data *driver_data;
>  };
>  
>  static inline struct mtk_dsi *encoder_to_dsi(struct drm_encoder *e)
> @@ -936,6 +940,7 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg)
>  	const char *tx_buf = msg->tx_buf;
>  	u8 config, cmdq_size, cmdq_off, type = msg->type;
>  	u32 reg_val, cmdq_mask, i;
> +	u32 reg_cmdq_off = dsi->driver_data->reg_cmdq_off;
>  
>  	if (MTK_DSI_HOST_IS_READ(type))
>  		config = BTA;
> @@ -955,9 +960,11 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg)
>  	}
>  
>  	for (i = 0; i < msg->tx_len; i++)
> -		writeb(tx_buf[i], dsi->regs + DSI_CMDQ0 + cmdq_off + i);
> +		mtk_dsi_mask(dsi, (reg_cmdq_off + cmdq_off + i) & (~0x3U),
> +			     (0xffUL << (((i + cmdq_off) & 3U) * 8U)),
> +			     tx_buf[i] << (((i + cmdq_off) & 3U) * 8U));

If writeb() has the same problem in MT2701, I think we need a patch that
just change writeb() to mtk_dsi_mask(), and then a patch to fix CMDQ reg
address of MT8173. So break this patch into two patches.

Regards,
CK

>  
> -	mtk_dsi_mask(dsi, DSI_CMDQ0, cmdq_mask, reg_val);
> +	mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val);
>  	mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size);
>  }
>  
> @@ -1101,6 +1108,8 @@ static int mtk_dsi_probe(struct platform_device *pdev)
>  	if (ret)
>  		goto err_unregister_host;
>  
> +	dsi->driver_data = of_device_get_match_data(dev);
> +
>  	dsi->engine_clk = devm_clk_get(dev, "engine");
>  	if (IS_ERR(dsi->engine_clk)) {
>  		ret = PTR_ERR(dsi->engine_clk);
> @@ -1194,9 +1203,19 @@ static int mtk_dsi_remove(struct platform_device *pdev)
>  	return 0;
>  }
>  
> +static const struct mtk_dsi_driver_data mt8173_dsi_driver_data = {
> +	.reg_cmdq_off = 0x200,
> +};
> +
> +static const struct mtk_dsi_driver_data mt2701_dsi_driver_data = {
> +	.reg_cmdq_off = 0x180,
> +};
> +
>  static const struct of_device_id mtk_dsi_of_match[] = {
> -	{ .compatible = "mediatek,mt2701-dsi" },
> -	{ .compatible = "mediatek,mt8173-dsi" },
> +	{ .compatible = "mediatek,mt2701-dsi",
> +	  .data = &mt2701_dsi_driver_data },
> +	{ .compatible = "mediatek,mt8173-dsi",
> +	  .data = &mt8173_dsi_driver_data },
>  	{ },
>  };
>  

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