Subject: Re: [v6, 1/5] media: dt-bindings: mt8183: Added camera ISP Pass 1

From: Jungo Lin <[email-masked]>
Date: Fri, 10 Apr 2020 18:04:17 +0800

Hi, Helen:

Thanks for your comment.

On Tue, 2020-03-31 at 12:34 -0300, Helen Koike wrote:
> Hi Jungo,
> 
> On 12/19/19 3:49 AM, Jungo Lin wrote:
> > This patch adds DT binding document for the Pass 1 (P1) unit
> > in Mediatek's camera ISP system. The Pass 1 unit grabs the sensor
> > data out from the sensor interface, applies ISP image effects
> > from tuning data and outputs the image data or statistics data to DRAM.
> > 
> > Reviewed-by: Rob Herring <[email-masked]>
> > Signed-off-by: Jungo Lin <[email-masked]>
> > ---
> > Changes from v6:
> >  - Add port node description in the dt-binding document.
> > ---
> >  .../bindings/media/mediatek,camisp.txt        | 83 +++++++++++++++++++
> 
> It would be really nice to convert this to yaml.
> 
> For reference: https://lwn.net/Articles/771621/
> 
> Regards,
> Helen
> 

We will plan to covert txt to yaml.
Hopefully, we could overcome the learning cue of yaml.

Thanks,

Jungo

> >  1 file changed, 83 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/media/mediatek,camisp.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/media/mediatek,camisp.txt b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
> > new file mode 100644
> > index 000000000000..a85f37c0b87d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
> > @@ -0,0 +1,83 @@
> > +* Mediatek Image Signal Processor Pass 1 (ISP P1)
> > +
> > +The Pass 1 unit of Mediatek's camera ISP system grabs the sensor data out
> > +from the sensor interface, applies ISP effects from tuning data and outputs
> > +the image data and statistics data to DRAM. Furthermore, Pass 1 unit has
> > +the ability to output two different resolutions frames at the same time to
> > +increase the performance of the camera application.
> > +
> > +Required properties:
> > +- compatible: Must be "mediatek,mt8183-camisp" for MT8183.
> > +- reg: Physical base address of the camera function block register and
> > +  length of memory mapped region. Must contain an entry for each entry
> > +  in reg-names.
> > +- reg-names: Must include the following entries:
> > +  "cam_sys": Camera base function block
> > +  "cam_uni": Camera UNI function block
> > +  "cam_a": Camera ISP P1 hardware unit A
> > +  "cam_b": Camera ISP P1 hardware unit B
> > +  "cam_c": Camera ISP P1 hardware unit C
> > +- interrupts: Must contain an entry for each entry in interrupt-names.
> > +- interrupt-names : Must include the following entries:
> > +  "cam_uni": Camera UNI interrupt
> > +  "cam_a": Camera unit A interrupt
> > +  "cam_b": Camera unit B interrupt
> > +  "cam_c": Camera unit C interrupt
> > +- iommus: Shall point to the respective IOMMU block with master port
> > +  as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> > +  for details.
> > +- clocks: A list of phandle and clock specifier pairs as listed
> > +  in clock-names property, see
> > +  Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> > +- clock-names: Must be "camsys_cam_cgpdn" and "camsys_camtg_cgpdn".
> > +- mediatek,larb: Must contain the local arbiters in the current SoCs, see
> > +  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> > +  for details.
> > +- power-domains: a phandle to the power domain, see
> > +  Documentation/devicetree/bindings/power/power_domain.txt for details.
> > +- mediatek,scp: The node of system control processor (SCP), see
> > +  Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details.
> > +- port: child port node corresponding to the data input, in accordance with
> > +  the video interface bindings defined in
> > +  Documentation/devicetree/bindings/media/video-interfaces.txt. The port
> > +  node must contain at least one endpoint.
> > +
> > +Example:
> > +SoC specific DT entry:
> > +
> > +	camisp: camisp@1a000000 {
> > +		compatible = "mediatek,mt8183-camisp";
> > +		reg = <0 0x1a000000 0 0x1000>,
> > +				<0 0x1a003000 0 0x1000>,
> > +				<0 0x1a004000 0 0x2000>,
> > +				<0 0x1a006000 0 0x2000>,
> > +				<0 0x1a008000 0 0x2000>;
> > +		reg-names = "cam_sys",
> > +				"cam_uni",
> > +				"cam_a",
> > +				"cam_b",
> > +				"cam_c";
> > +		interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_LOW>,
> > +				<GIC_SPI 254 IRQ_TYPE_LEVEL_LOW>,
> > +				<GIC_SPI 255 IRQ_TYPE_LEVEL_LOW>,
> > +				<GIC_SPI 256 IRQ_TYPE_LEVEL_LOW>;
> > +		interrupt-names = "cam_uni",
> > +				"cam_a",
> > +				"cam_b",
> > +				"cam_c";
> > +		iommus = <&iommu M4U_PORT_CAM_IMGO>;
> > +		clocks = <&camsys CLK_CAM_CAM>,
> > +				<&camsys CLK_CAM_CAMTG>;
> > +		clock-names = "camsys_cam_cgpdn",
> > +				"camsys_camtg_cgpdn";
> > +		mediatek,larb = <&larb3>,
> > +				<&larb6>;
> > +		power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>;
> > +		mediatek,scp = <&scp>;
> > +
> > +		port {
> > +			camisp_endpoint: endpoint {
> > +				remote-endpoint = <&seninf_camisp_endpoint>;
> > +			};
> > +		};
> > +	};
> > 
> 
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