Subject: [Kgdb-bugreport] [PATCH] ARM: change definition of cpu_relax() for ARM11MPCore

From: [email-masked] (George G. Davis)
Date: Thu, 15 Apr 2010 13:36:09 -0400

Hi,

On Mon, Apr 12, 2010 at 06:32:47PM +0100, Russell King - ARM Linux wrote:
> On Mon, Apr 12, 2010 at 06:23:58PM +0100, Will Deacon wrote:
> > This patch changes the definition of cpu_relax() to smp_mb() for ARMv6 cores,
> > forcing the write buffer to drain while inside a polling loop on an SMP system.
> > If the Kernel is not compiled for SMP support, this will expand to a barrier()
> > as before.

If I've followed these threads [1][2] correctly, this ARM11 MPCore issue
was discovered while running the "KGDB: internal test suite" (KGDB_TESTS)
and that problem is resolved via "kgdb: use atomic_inc and atomic_dec
instead of atomic_set" [3].  If so, isn't the original ARM11 MPCore KGDB
cpu_relax() issue just a red herring?  Shouldn't any polling loops
which depend on specific (hardware) write/read order implement appropriate
barriers rather than rely on cpu_relax() to guarantee order?  If
perhaps there are indeed other cases where cpu_relax() is being used
incorrectly, then maybe those should be fixed instead?  Just curious...

> Linus asked how expensive (in terms of power rather than performance)
> this was; so far that question has remained unanswered.  Can someone
> please answer his question?

Thanks!

--
Regards,
George
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2010-March/010691.html
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2010-March/011076.html
[3] http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff_plain;h=ae6bf53e0255c8ab04b6fe31806e318432570e3c