Subject: [PATCH 2/2] [CPUFREQ] s3c64xx: Add VDDINT voltage scaling

From: [email-masked] (Mark Brown)
Date: Mon, 5 Dec 2011 19:50:59 +0000

On Mon, Dec 05, 2011 at 08:45:47PM +0100, Tomasz Figa wrote:
> On Monday 05 of December 2011 19:25:06 Mark Brown wrote:

> > 133MHz and VDDINT at 1.05V.  And driver code showing some variation from
> > the power design guide :/

> I think that people from Samsung should be able to say something a bit more 
> precise on this. Am I right?

Here's hoping :)

> > If it's a question of regulator quality the board should just be adding
> > an offset in the constraints without the SoC drivers having to worry
> > their pretty little heads about it.  Like I say it's not an unknown

> Right, there is a field for regulator offset in regulation_constraints 
> struct indeed. Somehow I missed it, sorry.

It's possible you first looked at this with a kernel that didn't have
that feature - I added it sometime this year.