Subject: [PATCH v7] ARM: net: JIT compiler for packet filters

From: [email-masked] (Mircea Gherzan)
Date: Mon, 9 Jan 2012 10:58:34 +0200

On Mon, Jan 09, 2012 at 08:14:50AM +0100, Eric Dumazet wrote:
> Le samedi 07 janvier 2012 ? 12:52 +0100, Mircea Gherzan a ?crit :
> > Based of Matt Evans's PPC64 implementation.
> > 
> > The compiler generates ARM instructions but interworking is
> > supported for Thumb2 kernels.
> > 
> > Supports both little and big endian. Unaligned loads are emitted
> > for ARMv6+. Not all the BPF opcodes that deal with ancillary data
> > are supported. The scratch memory of the filter lives on the stack.
> > Hardware integer division is used if it is available.
> > 
> > Enabled in the same way as for x86-64 and PPC64:
> > 
> > 	echo 1 > /proc/sys/net/core/bpf_jit_enable
> > 
> > A value greater than 1 enables opcode output.
> > 
> > Signed-off-by: Mircea Gherzan <[email-masked]>
> > ---
> > 
> > Changes in v7:
> >  * fix the intruction generation for LDX_MSH, OR_X, LSH_K,
> >    RSH_K and JMP_JA
> >  * fix the condition for saving the A register
> >  * use fls() instead of the compiler builtin
> >  * punt to the interpreter on absolute loads with K < 0
> >  * check for invalid data references
> >  * support the NEG opcode
> >  * clear X in the prologue based on a context flag
> >  * simplify the conditional jumps
> > 
> > Changes in v6:
> >  * fix the code generation for the ANC_CPU opcode
> > 
> > Changes in v5:
> >  * replace SEEN_LEN with SEEN_SKB
> >  * set ctx->seen when handling some ancillary data opcodes
> > 
> > Changes in v4:
> >  * first check if the JIT compiler is enabled
> >  * fix the code generation for the LDX_MSH opcode
> > 
> > Changes in v3:
> >  * no longer depend on EABI and !Thumb2
> >  * add BLX "emulation" for ARMv4 without Thumb
> >  * use the integer divide instruction on Cortex-A15
> >  * fix the handling of the DIV_K opcode
> >  * use a C wrapper for __aeabi_uidiv
> >  * fix the generation of the epilogue (non-FP case)
> > 
> > Changes in v2:
> >  * enable the compiler only for ARMv5+ because of the BLX instruction
> >  * use the same comparison for the ARM version checks
> >  * use misaligned accesses on ARMv6
> >  * fix the SEEN_MEM
> >  * fix the mem_words_used()
> > 
> >  arch/arm/Kconfig          |    1 +
> >  arch/arm/Makefile         |    1 +
> >  arch/arm/net/Makefile     |    3 +
> >  arch/arm/net/bpf_jit_32.c |  912 +++++++++++++++++++++++++++++++++++++++++++++
> >  arch/arm/net/bpf_jit_32.h |  190 ++++++++++
> >  5 files changed, 1107 insertions(+), 0 deletions(-)
> >  create mode 100644 arch/arm/net/Makefile
> >  create mode 100644 arch/arm/net/bpf_jit_32.c
> >  create mode 100644 arch/arm/net/bpf_jit_32.h
> 
> Acked-by: Eric Dumazet <[email-masked]>
> 

Updated it in the patch tracking system as 7259/2. Since we're in the
middle of the merge window, can this one get into 3.3?

Thanks,
Mircea