Subject: [PATCH V2] ARM: dt: tegra: ventana: add regulators

From: [email-masked] (Mark Brown)
Date: Sat, 30 Jun 2012 12:42:53 +0100

On Fri, Jun 29, 2012 at 04:04:46PM -0600, Stephen Warren wrote:

> ldo0: The HW default is 1.2v. On similar board designs, this rail is
> typically used for the PCIe clock which requires 3.3v. Note that this
> rail isn't actually used on this board.

If it's not used at all it should probably be omitted from the DT
entirely.
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