Subject: Sharing PCIE driver between Microblaze and Arm zynq

From: [email-masked] (Arnd Bergmann)
Date: Fri, 7 Dec 2012 19:07:38 +0000

On Friday 07 December 2012, Michal Simek wrote:
> On 12/06/2012 10:27 PM, Bjorn Helgaas wrote:
> > [+cc linux-pci]
> >
> > On Thu, Dec 6, 2012 at 7:23 AM, Michal Simek <[email-masked]> wrote:
> >> Hi guys,
> >>
> >> I have a question regarding to sharing generic OF pcie driver between
> >> two architectures MB and ARM Zynq.
> >> Is drivers/pci/pcie location good for it?
> >> Make no sense to have the same driver in two locations.
> >
> > I think you're talking about a PCI host bridge driver.  It would
> > definitely be nice to move toward a generic, shared driver.  Host
> > bridge drivers are responsible for enumerating the PCI hierarchy below
> > the bridge.  Enumeration is not really PCIe-specific, so I wouldn't
> > put it in drivers/pci/pcie.
> 
> Not a PCI expert, just trying to find out the proper location for this shared driver.

I'd suggest creating a drivers/pci/host directory. We will have more of
these in the future. AFAIK, there is no fully generic (architecture
independent) way to interface a PCI host driver to the PCI subsystem,
but I think we are getting closer to that. You are probably fairly
free to modify the microblaze architecture specific code though if needed.

> >> Is using readl/writel IO functions in this driver the best option
> >> which we can have?
> >> Or is there any other recommendation?
> >
> > I'm not really a driver person, but if you're writing a new driver,
> > wouldn't you use the iomap interfaces (ioremap(), ioread32(), etc)
> > rather than readl()?
> 
> That driver exists but it is not in mainline and it is better to directly
> add it to proper location with correct io functions.
> The question is if ioread/iowrite functions are correct one.
> PowerPC io-defs.h suggests that readl/writel should be used for PCI.

ioread32/iowrite32 are defined to behave the same way readl/writel regarding
addressing modes and barriers, but also allow operating on __iomem pointers
that were returned from ioport_map(). You probably don't need that.

Some architectures like powerpc have their own accessors for on-chip MMIO
areas, but ARM does not. The PowerPC rule is that you must use either
readl/writel or ioread32/iowrite32 to access devices connected to a PCI
bus, but you would not necessarily do that for the PCI host controller
itself on PowerPC.

	Arnd

	Arnd