Subject: [RFC v1] PCIe support for the Armada 370 and Armada XP SoCs

From: [email-masked] (Thierry Reding)
Date: Thu, 3 Jan 2013 15:20:04 +0100

On Wed, Jan 02, 2013 at 01:09:32PM -0700, Jason Gunthorpe wrote:
> On Sat, Dec 29, 2012 at 10:33:59AM +0100, Thierry Reding wrote:
> 
> > It isn't actually required to make PCI work, but it enables PCI device
> > matching to DT nodes with the generic code. If we leave out the host
> > bridge, then the matching becomes rather complicated and we'll most
> 
> Can you elaborate on this a bit? What do pci bus location bindings look
> like?

Basically what you do is describe the PCI bus hierarchy using DT nodes,
where the reg properties are used to match device nodes to their PCI
devices. You can see a basic example for the controller here[0] and an
actual board DT here[1].

Contrary to what I said earlier, more recent tests seem to indicate that
the matching does indeed work even without the fake host bridge device.
Perhaps one of the changes or cleanups caused this. I'll do some further
testing to confirm this.

> BTW, does anyone have working links for the various PDFs (ePAR, PCI
> bindings, etc) for open firmware stuff, they all seem broken these
> days..

The ePAPR 1.1 and the PCI bindings are available here[2] and here[3].

[0]: https://gitorious.org/thierryreding/linux/blobs/tegra/next/arch/arm/boot/dts/tegra20.dtsi#line369
[1]: https://gitorious.org/thierryreding/linux/blobs/tegra/next/arch/arm/boot/dts/tegra20-tec.dts#line67
[2]: https://www.power.org/wp-content/uploads/2012/07/Power_ePAPR_APPROVED_v1.1.pdf
[3]: http://www.openfirmware.org/ofwg/bindings/pci/pci2_1.pdf

Thierry
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