Subject: [PATCH v8 5/5] ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND

From: [email-masked] (Tony Lindgren)
Date: Mon, 14 Jan 2013 10:06:02 -0800

* Ezequiel Garcia <[email-masked]> [121223 13:49]:
> On Fri, Dec 14, 2012 at 7:36 AM, Daniel Mack <[email-masked]> wrote:
> > +
> > +Example for an AM33xx board:
> > +
> > +       gpmc: gpmc at 50000000 {
> > +               compatible = "ti,am3352-gpmc";
> > +               ti,hwmods = "gpmc";
> > +               reg = <0x50000000 0x1000000>;
> > +               interrupts = <100>;
> > +               gpmc,num-cs = <8>;
> > +               gpmc,num-waitpins = <2>;
> > +               #address-cells = <2>;
> > +               #size-cells = <1>;
> > +               ranges = <0 0 0x08000000 0x2000>;       /* CS0: NAND */
> > +
> > +               nand at 0,0 {
> > +                       reg = <0 0 0>; /* CS0, offset 0 */
> 
> I'm a bit confused by this: what are the other two values in "reg"?
> I see you've only added a binding for CS.
> 
> I've extended a bit on your work and added a binding to enable OneNAND
> device on my IGEP board.
> 
> I might send some patches in case anyone wants to give it a try.

Daniel, should this be updated to just pass the CS?

Regards,

Tony