From: catalin.marinas@arm•com (Catalin Marinas)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 1/3] ARM: cacheflush: don't round address range up to nearest page
Date: Wed, 27 Mar 2013 11:05:18 +0000 [thread overview]
Message-ID: <20130327110518.GF801@MacBook-Pro.local> (raw)
In-Reply-To: <1364235486-17738-2-git-send-email-will.deacon@arm.com>
On Mon, Mar 25, 2013 at 06:18:04PM +0000, Will Deacon wrote:
> The flush_cache_user_range macro takes a pair of addresses describing
> the start and end of the virtual address range to flush. Due to an
> accidental oversight when flush_cache_range_user was introduced, the
> address range was rounded up so that the start and end addresses were
> page-aligned.
I don't think it was an accidental oversight but it was actually
covering other issue where writing an instruction caused a full page
CoW. We've fixed this issue since, so the patch is ok.
Reviewed-by: Catalin Marinas <catalin.marinas@arm•com>
next prev parent reply other threads:[~2013-03-27 11:05 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-25 18:18 [PATCH 0/3] Optimise cache-flushing system call and add iovec variant Will Deacon
2013-03-25 18:18 ` [PATCH 1/3] ARM: cacheflush: don't round address range up to nearest page Will Deacon
2013-03-27 11:05 ` Catalin Marinas [this message]
2013-03-25 18:18 ` [PATCH 2/3] ARM: cacheflush: don't bother rounding to nearest vma Will Deacon
2013-03-27 11:09 ` Catalin Marinas
2013-03-27 12:15 ` Will Deacon
2013-03-27 12:21 ` Catalin Marinas
2013-03-27 12:43 ` Will Deacon
2013-03-27 13:08 ` Catalin Marinas
2013-03-25 18:18 ` [PATCH 3/3] ARM: cacheflush: add new iovec-based cache flushing system call Will Deacon
2013-03-27 11:12 ` Catalin Marinas
2013-05-23 10:52 ` Will Deacon
2013-03-25 18:44 ` [PATCH 0/3] Optimise cache-flushing system call and add iovec variant Jonathan Austin
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