Subject: [PATCH V3 1/5] spi: s3c64xx: modified error interrupt handling and init

From: [email-masked] (Mark Brown)
Date: Mon, 1 Apr 2013 14:03:09 +0100

On Wed, Mar 13, 2013 at 12:13:30PM +0530, Girish K S wrote:
> From: Girish K S <[email-masked]>
> 
> The status of the interrupt is available in the status register,
> so reading the clear pending register and writing back the same
> value will not actually clear the pending interrupts. This patch
> modifies the interrupt handler to read the status register and
> clear the corresponding pending bit in the clear pending register.

Applied, thanks.

> Signed-off-by: Girish K S <[email-masked]>

This and the committer e-mail address (the From: above) really ought to
match up with each other.
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