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From: arnd@arndb•de (Arnd Bergmann)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH] ARM: shmobile: r8a7790 SMP prototype v2
Date: Tue, 9 Jul 2013 01:21:50 +0200	[thread overview]
Message-ID: <201307090121.50685.arnd@arndb.de> (raw)
In-Reply-To: <CANqRtoRR-pyCpXYwKXRYSfVOewv+dXf=ntofJJsKQ0defF5-MQ@mail.gmail.com>

On Monday 08 July 2013, Magnus Damm wrote:
> >> +static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
> >> +{
> >> +     void __iomem *p;
> >> +     unsigned int k;
> >> +
> >> +     shmobile_boot_fn = virt_to_phys(shmobile_invalidate_start);
> >> +
> >> +     /* MERAM for jump stub, because BAR requires 256KB aligned address */
> >> +     p = ioremap_nocache(MERAM, 16);
> >> +     memcpy(p, shmobile_boot_vector, 16);
> >> +     iounmap(p);
> >
> > On the other hand here you have to use __raw_writel() or
> > memcpy_toio() because memcpy cannot operate on __iomem tokens.
> >
> > Also, if this is actually memory, you probably want to use ioremap_cached
> > or ioremap_writecombine.
> 
> Yeah, I realize this may be a bit of a mess. So say that I used
> ioremap_cached() here, I think I still need to flush the cache to make
> sure the secondary processors have valid code available then they
> boot. I suppose you're fine with that?

Is that required to get the data from dcache to icache? If so, that
sounds right.

	Arnd

  reply	other threads:[~2013-07-08 23:21 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-26 23:58 [PATCH] ARM: shmobile: r8a7790 SMP prototype v2 Magnus Damm
2013-06-27  8:43 ` Russell King - ARM Linux
2013-07-08  4:48   ` Magnus Damm
2013-06-27 12:01 ` Arnd Bergmann
2013-07-08  4:52   ` Magnus Damm
2013-07-08 23:21     ` Arnd Bergmann [this message]
2013-07-09  1:29       ` Magnus Damm

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