Subject: [PATCH v3 1/3] ARM: Introduce atomic MMIO modify

From: [email-masked] (Ezequiel Garcia)
Date: Fri, 23 Aug 2013 08:32:26 -0300

On Fri, Aug 23, 2013 at 08:07:50AM -0300, Ezequiel Garcia wrote:
> On Fri, Aug 23, 2013 at 01:38:02PM +0300, Baruch Siach wrote:
> > HI Ezequiel,
> > 
> > On Fri, Aug 23, 2013 at 07:24:03AM -0300, Ezequiel Garcia wrote:
> > > Some SoC have MMIO regions that are shared across orthogonal
> > > subsystems. This commit implements a possible solution for the
> > > thread-safe access of such regions through a spinlock-protected API.
> > > 
> > > Concurrent access is protected with a single spinlock for the
> > > entire MMIO address space. While this protects shared-registers,
> > > it also serializes access to unrelated/unshared registers.
> > > 
> > > We add relaxed and non-relaxed variants, by using writel_relaxed and writel,
> > > respectively. The rationale for this is that some users may not require
> > > register write completion but only thread-safe access to a register.
> > > 
> > > Signed-off-by: Ezequiel Garcia <[email-masked]>
> > 
> > Is there a reason why this should be limited to ARM? I haven't found anything 
> > ARM specific in the code.
> > 
> 
> I guess not.
> 

... or maybe yes. I'm not seeing {readl,writel}_relaxed as guaranteed
to exist in every architecture. So, indeed, this seems to be ARM-dependent.
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com