From: marex@denx•de (Marek Vasut)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v7 0/2] Add PCIe support for i.MX6q
Date: Fri, 11 Oct 2013 04:13:02 +0200 [thread overview]
Message-ID: <201310110413.02354.marex@denx.de> (raw)
In-Reply-To: <CAErSpo5e5ZyVqGOHR9p568k7_Qx4tBQCBjQvWvL+xGCqFLHHKQ@mail.gmail.com>
Hi Bjorn,
> On Thu, Oct 10, 2013 at 11:39 AM, Marek Vasut <marex@denx•de> wrote:
> > Hi Bjorn,
> >
> >> [+cc Yinghai]
> >>
> >> On Thu, Oct 10, 2013 at 9:58 AM, Marek Vasut <marex@denx•de> wrote:
> >> >> On Thu, Oct 10, 2013 at 4:25 AM, Marek Vasut <marex@denx•de> wrote:
> >> > I tried you suggestion, this is what I got now (and with V7 of the
> >> > patches):
> >> >
> >> > Note that my topology is: rootport->2_port_switch->ethernet_chip , the
> >> > other port of the switch is not used .
> >> >
> >> > imx6q-pcie 1ffc000.pcie: phy link never came up
After discussing with Tim a little, looks like a clock bit was missing. The
above line was the cause of all the issues. Now I can probe the bus, but I still
need more patches:
This dirty patch here limits the PCIe operation to GEN1 only. It's based on this
Freescale patch [1]. Without this change, the PCIe switch is not detected. Any
idea why? (I also had to increase the PHY startup delay to get GEN1 going).
[1] https://www.osadl.org/monitoring/patches/r8s7/1342-ENGR00180230-MX6-PCIE-
enlarge-the-eye-diagram-and-fo.patch
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 32b30ca..df2838b 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -330,13 +330,16 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
dw_pcie_setup_rc(pp);
+// Enable GEN1
+writel(((readl(pp->dbi_base + 0x7c) & 0xfffffff0) | 0x1), pp->dbi_base + 0x7c);
+
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2, 1 << 10);
while (!dw_pcie_link_up(pp)) {
usleep_range(100, 1000);
count++;
- if (count >= 10) {
+ if (count >= 200) {
dev_err(pp->dev, "phy link never came up\n");
dev_dbg(pp->dev,
"DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
Best regards,
Marek Vasut
next prev parent reply other threads:[~2013-10-11 2:13 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-26 3:24 [PATCH v7 0/2] Add PCIe support for i.MX6q Shawn Guo
2013-09-26 3:24 ` [PATCH v7 1/2] ARM: imx6q: Add PCIe bits to GPR syscon definition Shawn Guo
2013-09-26 3:24 ` [PATCH v7 2/2] PCI: imx6: Add support for i.MX6 PCIe controller Shawn Guo
2013-09-27 19:24 ` [PATCH v7 0/2] Add PCIe support for i.MX6q Bjorn Helgaas
2013-09-28 6:56 ` Shawn Guo
2013-10-08 20:56 ` Marek Vasut
2013-10-09 5:23 ` Zhu Richard-R65037
2013-10-10 10:25 ` Marek Vasut
2013-10-10 10:40 ` Zhu Richard-R65037
2013-10-10 12:59 ` Marek Vasut
2013-10-10 20:33 ` Tim Harvey
2013-10-10 20:40 ` Marek Vasut
2013-10-10 13:27 ` Bjorn Helgaas
2013-10-10 13:43 ` Marek Vasut
2013-10-10 15:58 ` Marek Vasut
2013-10-10 17:17 ` Bjorn Helgaas
2013-10-10 17:39 ` Marek Vasut
2013-10-10 17:56 ` Bjorn Helgaas
2013-10-11 2:12 ` [PATCH 1/2] PCI: imx6: Make reset-gpio optional Marek Vasut
2013-10-11 2:12 ` [PATCH 2/2] PCI: imx6: Fix the clock for PCIe Marek Vasut
2013-10-11 7:20 ` Jingoo Han
2013-10-11 11:55 ` Marek Vasut
2013-10-12 7:13 ` Shawn Guo
2013-10-11 7:09 ` [PATCH 1/2] PCI: imx6: Make reset-gpio optional Jingoo Han
2013-10-12 7:20 ` Shawn Guo
2013-10-12 9:28 ` Marek Vasut
2013-10-14 0:02 ` Jingoo Han
2013-10-14 0:44 ` Marek Vasut
2013-10-14 1:17 ` Marek Vasut
2013-10-14 2:33 ` Jingoo Han
2013-10-14 3:23 ` Marek Vasut
2013-10-11 2:13 ` Marek Vasut [this message]
2013-10-11 2:18 ` [PATCH v7 0/2] Add PCIe support for i.MX6q Marek Vasut
2013-10-11 2:29 ` Zhu Richard-R65037
2013-10-11 4:44 ` Yinghai Lu
2013-10-11 14:44 ` Marek Vasut
2013-10-11 15:24 ` Tim Harvey
2013-10-11 20:13 ` Marek Vasut
2013-10-12 2:16 ` Zhu Richard-R65037
2013-10-12 2:30 ` Marek Vasut
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