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From: arnd@arndb•de (Arnd Bergmann)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v4 2/4] arm64: dts: APM X-Gene PCIe device tree nodes
Date: Sat, 15 Mar 2014 09:58:52 +0100	[thread overview]
Message-ID: <201403150958.52419.arnd@arndb.de> (raw)
In-Reply-To: <CACoXjc=t1SuyE5jzHjGk7eNUjVCNW9_iqOTru8PQ191h=pP1sw@mail.gmail.com>

On Saturday 15 March 2014, Tanmay Inamdar wrote:
> On Fri, Mar 14, 2014 at 5:07 AM, Arnd Bergmann <arnd@arndb•de> wrote:
> > On Thursday 06 March 2014, Tanmay Inamdar wrote:
> >> +             pcie0: pcie at 1f2b0000 {
> >> +                     status = "disabled";
> >> +                     device_type = "pci";
> >> +                     compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
> >> +                     #interrupt-cells = <1>;
> >> +                     #size-cells = <2>;
> >> +                     #address-cells = <3>;
> >> +                     reg = < 0x00 0x1f2b0000 0x0 0x00010000   /* Controller registers */
> >> +                             0xe0 0xd0000000 0x0 0x00200000>; /* PCI config space */
> >> +                     reg-names = "csr", "cfg";
> >> +                     ranges = <0x01000000 0x00 0x00000000 0xe0 0x00000000 0x00 0x00010000   /* io */
> >> +                               0x02000000 0x00 0x10000000 0xe0 0x10000000 0x00 0x80000000>; /* mem */
> >> +                     dma-ranges = <0x42000000 0x40 0x00000000 0x40 0x00000000 0x40 0x00000000>;
> >> +                     interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> >> +                     interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
> >> +                                      0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
> >> +                                      0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
> >> +                                      0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
> >> +                     clocks = <&pcie0clk 0>;
> >> +             };
> >
> > Is 0x40.0x00000000 the start of your RAM? I had expected RAM to start at 0.0,
> > and in that case the dma-ranges property would be wrong.
> 
> RAM starting address is 0x40_00000000.

Ok, it's good then. Thanks for the clarification, I keep losing track of how each of
the ~40 SoCs I'm dealing with handles these things.

	Arnd

  reply	other threads:[~2014-03-15  8:58 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-06  6:05 [PATCH v4 0/4] APM X-Gene PCIe controller Tanmay Inamdar
2014-03-06  6:06 ` [PATCH v4 1/4] pci: APM X-Gene PCIe controller driver Tanmay Inamdar
2014-03-07  8:37   ` Jingoo Han
2014-03-07 18:32     ` Tanmay Inamdar
2014-03-14 12:18   ` Arnd Bergmann
2014-03-15  3:29     ` Tanmay Inamdar
2014-03-06  6:06 ` [PATCH v4 2/4] arm64: dts: APM X-Gene PCIe device tree nodes Tanmay Inamdar
2014-03-12  8:31   ` Jingoo Han
2014-03-12 16:44     ` Tanmay Inamdar
2014-03-14 12:07   ` Arnd Bergmann
2014-03-15  3:27     ` Tanmay Inamdar
2014-03-15  8:58       ` Arnd Bergmann [this message]
2014-03-06  6:06 ` [PATCH v4 3/4] dt-bindings: pci: xgene pcie device tree bindings Tanmay Inamdar
2014-03-06  6:06 ` [PATCH v4 4/4] MAINTAINERS: entry for APM X-Gene PCIe host driver Tanmay Inamdar

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