Subject: [PATCH 6/8] tty/serial: pl011: add generic earlycon support

From: [email-masked] (Catalin Marinas)
Date: Mon, 24 Mar 2014 11:28:21 +0000

On Fri, Mar 21, 2014 at 09:08:46PM +0000, Rob Herring wrote:
> From: Rob Herring <[email-masked]>
> 
> Add earlycon support for the pl011 serial port. This allows enabling
> the pl011 for console when early_params are processed. This is based
> on the arm64 earlyprintk support and is intended to replace it.
> 
> Signed-off-by: Rob Herring <[email-masked]>
> Cc: Russell King <[email-masked]>
> Cc: Greg Kroah-Hartman <[email-masked]>
> Cc: Jiri Slaby <[email-masked]>
> ---
>  Documentation/kernel-parameters.txt |  5 +++--
>  drivers/tty/serial/amba-pl011.c     | 30 +++++++++++++++++++++++++++++-
>  2 files changed, 32 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> index 5ce8b7a..81bdd52 100644
> --- a/Documentation/kernel-parameters.txt
> +++ b/Documentation/kernel-parameters.txt
> @@ -887,8 +887,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>  		uart[8250],io,<addr>[,options]
>  		uart[8250],mmio,<addr>[,options]
>  		uart[8250],mmio32,<addr>[,options]
> -			Start an early, polled-mode console on the 8250/16550
> -			UART at the specified I/O port or MMIO address.
> +		pl011,<addr>
> +			Start an early, polled-mode console on a serial port
> +			at the specified I/O port or MMIO address. 8250
>  			MMIO inter-register address stride is either 8-bit
>  			(mmio) or 32-bit (mmio32).
>  			The options are the same as for ttyS, above.

I think the last line is a bit misleading. Or did you intend to leave it
with the uart[8250] parameter? See below:

> diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
> index d4eda24..4227c0a 100644
> --- a/drivers/tty/serial/amba-pl011.c
> +++ b/drivers/tty/serial/amba-pl011.c
[...]
> +static int __init pl011_early_console_setup(struct earlycon_device *device,
> +					    const char *opt)
> +{
> +	if (!device->port.membase)
> +		return -ENODEV;
> +
> +	device->con->write = pl011_early_write;
> +	return 0;
> +}
> +EARLYCON_DECLARE(pl011, pl011_early_console_setup);

Here we expect the PL011 to be already initialised by the boot loader
and the kernel continues using the same settings. So maybe clarify this
in the pl011 kernel parameter doc and we can add proper configuration
using a separate patch.

-- 
Catalin