Subject: [PATCH v2 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices

From: [email-masked] (Maxime Ripard)
Date: Thu, 8 May 2014 09:29:34 -0500

On Thu, May 08, 2014 at 11:40:59AM +0800, Chen-Yu Tsai wrote:
> >> +                     apb0_gates: apb0_gates_clk {
> >> +                             compatible = "allwinner,sun6i-a31-apb0-gates-clk";
> >> +                             #clock-cells = <1>;
> >> +                             clocks = <&apb0>;
> >> +                             clock-output-names = "apb0_pio", "apb0_ir",
> >> +                                             "apb0_timer01", "apb0_p2wi",
> >
> > timer01 ? is this a typo?
> 
> A23 manual lists the clock gate as "r_timer0_1", so I put the name on the wiki.
> Allwinner sun6i code uses "r_tmr" or just "tmr". I see no problem naming this
> clock output as "apb0_timer" though.

Yep, it seems better.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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