Subject: [PATCH] ARM: mm: Add workaround for erratum 763126

From: [email-masked] (Will Deacon)
Date: Thu, 8 May 2014 18:38:53 +0100

Hi guys,

On Thu, May 08, 2014 at 05:57:03PM +0100, Doug Anderson wrote:
> On Wed, May 7, 2014 at 10:55 PM, Arjun.K.V <[email-masked]> wrote:
> > From: "Arjun.K.V" <[email-masked]>
> >
> > Three processor exclusive access livelock.
> > In a system with three or more coherent masters that all use
> > the ldrex/strex synchronization primitives to access a semaphore
> > in coherent cacheable memory, there is a possibility of a
> > livelock condition where two masters continuously attempt
> > and fail to get the lock while the third master
> > continuously reads the lock.

Tentative NAK. You're paraphrasing the bug to make it sound worse than it
is -- whilst two of the cores need to be in a ldrex/strex loop, the third
needs to be issuing snoops from a normal load (to get the line into a shared
state). Please can you point me at the code in Linux which is triggering
this issue?

Cheers,

Will