From: will.deacon@arm•com (Will Deacon)
To: linux-arm-kernel@lists•infradead.org
Subject: [RFC/PATCH 7/7] iommu-api: Add domain attribute to enable coherent HTW
Date: Thu, 3 Jul 2014 18:43:21 +0100 [thread overview]
Message-ID: <20140703174321.GE17372@arm.com> (raw)
In-Reply-To: <53B48381.9050707@codeaurora.org>
On Wed, Jul 02, 2014 at 11:11:13PM +0100, Olav Haugan wrote:
> On 7/1/2014 1:49 AM, Varun Sethi wrote:
> >
> >
> >> -----Original Message-----
> >> From: iommu-bounces at lists.linux-foundation.org [mailto:iommu-
> >> bounces at lists.linux-foundation.org] On Behalf Of Olav Haugan
> >> Sent: Monday, June 30, 2014 10:22 PM
> >> To: linux-arm-kernel at lists.infradead.org; iommu at lists.linux-
> >> foundation.org
> >> Cc: linux-arm-msm at vger.kernel.org; will.deacon at arm.com;
> >> thierry.reding at gmail.com; vgandhi at codeaurora.org
> >> Subject: [RFC/PATCH 7/7] iommu-api: Add domain attribute to enable
> >> coherent HTW
> >>
> >> Add a new iommu domain attribute that can be used to enable cache
> >> coherent hardware table walks (HTW) by the SMMU. HTW might be supported
> >> by the SMMU HW but depending on the use case and the usage of the SMMU in
> >> the SoC it might not be always beneficial to always turn on coherent HTW
> >> for all domains/iommu's.
> >>
> > [Sethi Varun-B16395] Why won't you want to use the coherent table walk feature?
>
> Very good question. We have found that turning on IOMMU coherent HTW is
> not always beneficial to performance (performance either the same or
> slightly worse in some cases). Even if the perf. is the same we would
> like to avoid using precious L2 cache for no benefit to the IOMMU.
> Although our HW supports this feature we don't always want to turn this
> on for a specific use case/domain (bus master).
Could we at least invert the feature flag, please? i.e. you set an attribute
to *disable* coherent walks? I'd also be interested to see some performance
numbers, as the added cacheflushing overhead from non-coherent walks is
going to be non-trivial.
Will
next prev parent reply other threads:[~2014-07-03 17:43 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-30 16:51 [RFC/PATCH 0/7] Add MSM SMMUv1 support Olav Haugan
2014-06-30 16:51 ` [RFC/PATCH 1/7] iommu: msm: Rename iommu driver files Olav Haugan
2014-06-30 16:51 ` [RFC/PATCH 2/7] iommu-api: Add map_range/unmap_range functions Olav Haugan
2014-06-30 19:42 ` Thierry Reding
2014-07-01 9:33 ` Will Deacon
2014-07-01 9:58 ` Varun Sethi
2014-07-04 4:29 ` Hiroshi Doyu
2014-07-08 21:53 ` Olav Haugan
2014-07-08 23:49 ` Rob Clark
2014-07-10 0:03 ` Olav Haugan
2014-07-10 0:40 ` Rob Clark
2014-07-10 7:10 ` Thierry Reding
2014-07-10 11:15 ` Rob Clark
2014-07-10 22:43 ` Olav Haugan
2014-07-10 23:42 ` Rob Clark
2014-07-11 10:20 ` Joerg Roedel
2014-07-15 1:13 ` Olav Haugan
2014-06-30 16:51 ` [RFC/PATCH 3/7] iopoll: Introduce memory-mapped IO polling macros Olav Haugan
2014-06-30 19:46 ` Thierry Reding
2014-07-01 9:40 ` Will Deacon
2014-06-30 16:51 ` [RFC/PATCH 5/7] iommu: msm: Add support for V7L page table format Olav Haugan
2014-06-30 16:51 ` [RFC/PATCH 6/7] defconfig: msm: Enable Qualcomm SMMUv1 driver Olav Haugan
2014-06-30 16:51 ` [RFC/PATCH 7/7] iommu-api: Add domain attribute to enable coherent HTW Olav Haugan
2014-07-01 8:49 ` Varun Sethi
2014-07-02 22:11 ` Olav Haugan
2014-07-03 17:43 ` Will Deacon [this message]
2014-07-08 22:24 ` Olav Haugan
[not found] ` <1404147116-4598-5-git-send-email-ohaugan@codeaurora.org>
2014-06-30 17:02 ` [RFC/PATCH 4/7] iommu: msm: Add MSM IOMMUv1 driver Will Deacon
2014-07-02 22:32 ` Olav Haugan
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