From: catalin.marinas@arm•com (Catalin Marinas)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 4/4] ARM: hwcap: disable HWCAP_SWP if the CPU advertises it has exclusives
Date: Mon, 7 Jul 2014 13:05:52 +0100 [thread overview]
Message-ID: <20140707120552.GB32276@arm.com> (raw)
In-Reply-To: <20140707111712.GZ21766@n2100.arm.linux.org.uk>
On Mon, Jul 07, 2014 at 12:17:12PM +0100, Russell King - ARM Linux wrote:
> On Mon, Jul 07, 2014 at 12:02:48PM +0100, Catalin Marinas wrote:
> > I'm not sure that's the right approach. ARM added the CPUID scheme to
> > allow the software to check specific features rather than guessing
> > specific architecture versions. Basically there isn't a clear way to
> > identify whether your CPU is ARMv6K or ARMv7 from a single ID register
> > read (you may be able to infer by reading multiple ID regs).
> >
> > I'm now trying to figure out whether the TPIDR registers actually have a
> > dedicated ID. I think they only come as part of the VMSA version 7 as
> > identified from ID_MMFR0. The ARM1136 r1p1 TRM states that ID_MMFR0[3:0]
> > are 0x3 which mean VMSAv7.
>
> You can't rely on the CPUID registers on 1136, because it doesn't
> advertise them as being present - the architecture field of MIDR is
> 0x7, not 0xf.
I was hoping they changed it with r1 but looking at the TRM that's not
the case.
> So actually, 1136r0 is the architecturally correct version, and 1136r1
> is the slightly cocked up non-standard version where we have to be careful
> how we treat it.
Yes. Looking at ARM1176, it seems to be using the full CPUID scheme and
reporting VMSAv7. So I guess we can safely assume TLS presence if VMSAv7
(actually what __get_cpu_architecture checks) or ARM1136 r1+. This would
be slightly different from the current assumption that TLS is present on
ARMv6+ except ARM1136r0 but I'm not aware of any other ARMv6 non-CPUID
processor without TLS (ARM1156 has CPUID and reports PMSAv6).
--
Catalin
next prev parent reply other threads:[~2014-07-07 12:05 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-04 19:51 [PATCH 0/4] ABI updates Russell King - ARM Linux
2014-07-04 19:52 ` [PATCH 1/4] ARM: alignment: save last kernel aligned fault location Russell King
2014-07-04 19:52 ` [PATCH 2/4] ARM: SWP emulation: always enable when SMP is enabled Russell King
2014-07-04 19:52 ` [PATCH 3/4] ARM: SWP emulation: only initialise on ARMv7 CPUs Russell King
2014-07-04 19:52 ` [PATCH 4/4] ARM: hwcap: disable HWCAP_SWP if the CPU advertises it has exclusives Russell King
2014-07-04 20:11 ` Arnd Bergmann
2014-07-04 20:51 ` Russell King - ARM Linux
2014-07-04 20:58 ` Arnd Bergmann
2014-07-04 21:48 ` Russell King - ARM Linux
2014-07-05 18:46 ` Arnd Bergmann
2014-07-07 11:02 ` Catalin Marinas
2014-07-07 11:17 ` Russell King - ARM Linux
2014-07-07 12:05 ` Catalin Marinas [this message]
2014-07-07 13:13 ` Russell King - ARM Linux
2014-07-07 13:46 ` Catalin Marinas
2014-07-07 15:31 ` Russell King - ARM Linux
2014-07-07 15:59 ` Catalin Marinas
2014-07-07 16:31 ` Russell King - ARM Linux
2014-07-07 17:50 ` Catalin Marinas
2014-07-07 9:34 ` Will Deacon
2014-07-07 9:41 ` Russell King - ARM Linux
2014-07-07 9:51 ` Will Deacon
2014-07-04 20:12 ` [PATCH 0/4] ABI updates Arnd Bergmann
2014-07-07 11:19 ` Tony Lindgren
2014-07-07 11:23 ` Russell King - ARM Linux
2014-07-07 13:23 ` Tony Lindgren
2014-07-07 13:52 ` Catalin Marinas
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