Subject: [PATCH v3 11/12] mmc: sunxi: Convert MMC driver to the standard clock phase API

From: [email-masked] (Maxime Ripard)
Date: Fri, 26 Sep 2014 17:02:04 +0200

On Fri, Sep 26, 2014 at 04:27:10PM +0200, David Lanzend?rfer wrote:
> Hello
> > Now that we have proper support to use the generic phase API in our clock
> > driver, switch the MMC driver to use it.
> > [...]
> >  	/* determine delays */
> >  	if (rate <= 400000) {
> > -		oclk_dly = 0;
> > -		sclk_dly = 7;
> > +		oclk_dly = 180;
> > +		sclk_dly = 42;
> > [...]
> How did you calculate the actual phase values from the original parameters?

Like shown in the clock driver. 0 is always a 180 deg phase shift, and
any other value is the number of the parent clock cycle to outphase
the clock of.

the clock out phase is calculating using:

phase = 360 * interval / period.

with period = 1 / (parent_freq / divider)
and interval = reg / parent_freq

which makes

phase = 360 * (reg / parent_freq) * (parent_freq / divider)

If we simplify by removing the parent_freq, we end up with

phase = 360 * reg / divider, which makes it rather trivial to
calculate.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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