From: thomas.petazzoni@free-electrons•com (Thomas Petazzoni)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 5/5] ARM: mvebu: Add Armada 385 Access Point Development Board support
Date: Fri, 5 Dec 2014 17:07:26 +0100 [thread overview]
Message-ID: <20141205170726.2e2335af@free-electrons.com> (raw)
In-Reply-To: <1417790698-9792-6-git-send-email-maxime.ripard@free-electrons.com>
Dear Maxime Ripard,
On Fri, 5 Dec 2014 15:44:58 +0100, Maxime Ripard wrote:
> + soc {
> + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
> + MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
> + MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 /* CESA0: PHYS=0xf1100000
> + size 64K */
> + MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; /* CESA1: PHYS=0xf1110000
> + size 64K */
Those two last ranges are not needed, and may not necessarily match what
we decide to do with the crypto engine support later on.
> + mdio at 72004 {
> + pinctrl-names = <&phy_pins>;
These are not really "PHY" pins, but rather MDIO pins.
> + pinctrl at 18000 {
> + ge0_pins: ge-pins-0 {
> + marvell,pins = "mpp6", "mpp7", "mpp8",
> + "mpp9", "mpp10", "mpp11",
> + "mpp12", "mpp13", "mpp14",
> + "mpp15", "mpp16", "mpp17";
> + marvell,function = "ge0";
> + };
This seems like the normal pin muxing for RGMII, so maybe we should
simply do like we did for Armada 370: have a ge0-rgmii-pins definition
in the .dtsi file.
> + i2c0_pins: i2c-pins-0 {
> + marvell,pins = "mpp2", "mpp3";
> + marvell,function = "i2c0";
> + };
Same question here, maybe define it in .dtsi ?
> +
> + phy_pins: phy-pins {
> + marvell,pins = "mpp4", "mpp5";
> + marvell,function = "ge";
> + };
Same here.
> +
> + ref_clk0_pins: ref-clk-pins-0 {
> + marvell,pins = "mpp45";
> + marvell,function = "ref";
> + };
> +
> + spi1_pins: spi-pins-1 {
> + marvell,pins = "mpp56", "mpp57", "mpp58",
> + "mpp59";
> + marvell,function = "spi1";
> + };
> +
> + uart0_pins: uart-pins-0 {
> + marvell,pins = "mpp0", "mpp1";
> + marvell,function = "ua0";
> + };
> +
> + uart1_pins: uart-pins-1 {
> + marvell,pins = "mpp19", "mpp20";
> + marvell,function = "ua1";
> + };
> +
> + xhci0_vbus_pins: xhci0-vbus-pins {
> + marvell,pins = "mpp44";
> + marvell,function = "gpio";
> + };
> + };
> +
> + ethernet at 30000 {
> + status = "okay";
> + phy = <&phy1>;
> + phy-mode = "sgmii";
> + };
> +
> + ethernet at 34000 {
> + status = "okay";
> + phy = <&phy2>;
> + phy-mode = "sgmii";
> + };
> +
> + ethernet at 70000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&ge0_pins>, <&ref_clk0_pins>;
Maybe a short comment about what this ref_clk0_pins is useful for would
be nice.
> + status = "okay";
> + phy = <&phy0>;
> + phy-mode = "rgmii-id";
> + };
> +
> + usb3 at f0000 {
> + status = "okay";
> + };
The board also has an USB2 connector, did you try enabling it?
> + };
> +
> + pcie-controller {
> + status = "okay";
> + /*
> + * The two PCIe units are accessible through
> + * standard PCIe slots on the board.
Two, or three ? :-)
> + */
> + pcie at 1,0 {
> + /* Port 0, Lane 0 */
> + status = "okay";
> + };
> +
> + pcie at 2,0 {
> + /* Port 1, Lane 0 */
> + status = "okay";
> + };
> +
> + pcie at 3,0 {
> + /* Port 2, Lane 0 */
> + status = "okay";
> + };
> + };
> + };
> +
> + reg_xhci0_vbus: xhci0-vbus {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&xhci0_vbus_pins>;
> + regulator-name = "xhci0-vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + enable-active-high;
> + regulator-always-on;
> + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
> + };
Maybe you could connect this to the USB controller by using the
usb-nop-xceiv thing (which acts as a dummy USB PHY, if I understood
correctly) ?
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
next prev parent reply other threads:[~2014-12-05 16:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-05 14:44 [PATCH 0/5] ARM: mvebu: Add Armada 385 AP support Maxime Ripard
2014-12-05 14:44 ` [PATCH 1/5] ARM: mvebu: Rename DEBUG_LL to indicate UART index Maxime Ripard
2014-12-05 14:44 ` [PATCH 2/5] ARM: mvebu: Add UART1 as DEBUG_LL possible target Maxime Ripard
2014-12-05 15:25 ` Jason Cooper
2014-12-05 15:41 ` Arnd Bergmann
2014-12-05 14:44 ` [PATCH 3/5] ARM: mvebu: a38x: Fix node names Maxime Ripard
2014-12-05 14:44 ` [PATCH 4/5] pinctrl: mvebu: a38x: Add UART1 muxing options Maxime Ripard
2014-12-05 15:26 ` Jason Cooper
2015-01-09 10:05 ` Linus Walleij
2015-01-09 11:45 ` Jason Cooper
2015-01-10 21:44 ` Linus Walleij
2015-01-12 13:40 ` Jason Cooper
2014-12-05 14:44 ` [PATCH 5/5] ARM: mvebu: Add Armada 385 Access Point Development Board support Maxime Ripard
2014-12-05 15:42 ` Arnd Bergmann
2014-12-05 16:07 ` Thomas Petazzoni [this message]
2014-12-10 10:17 ` Gregory CLEMENT
2014-12-05 16:00 ` [PATCH 0/5] ARM: mvebu: Add Armada 385 AP support Andrew Lunn
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