Subject: [PATCH] irqchip: omap-intc: improve IRQ handler

From: [email-masked] (Felipe Balbi)
Date: Fri, 2 Jan 2015 15:39:17 -0600

On Fri, Jan 02, 2015 at 01:32:51PM -0800, Tony Lindgren wrote:
> * Felipe Balbi <[email-masked]> [150102 10:50]:
> > as it turns out the current IRQ number will
> > *always* be available from SIR register which
> > renders the reads of PENDING registers as plain
> > unnecessary overhead.
> > 
> > In order to catch any situation where SIR reads
> > as zero, we're adding a WARN() to turn it into
> > a very verbose error and users actually report
> > it.
> > 
> > With this patch average running time of
> > omap_intc_handle_irq() reduced from about 28.5us
> > to 19.8us as measured by the kernel function
> > profiler.
> 
> That's a nice improvment for an interrupt controller :)
>  
> > Tested with BeagleBoneBlack Rev A5C.
> > 
> > Signed-off-by: Felipe Balbi <[email-masked]>
> > ---
> > 
> > Before applying, it would be very nice to get reports
> > from other folks on different platforms, specially OMAP2/3
> > ones which I don't have (easy) access.
> 
> Seems to behave just fine on omap2 and 3 here, gave it
> a quick try on n800, n900, omap3-ldp and 37xx-evm:
> 
> Tested-by: Tony Lindgren <[email-masked]>

cool, thanks

-- 
balbi
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