From: tony@atomide•com (Tony Lindgren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v11 2/9] ARM: l2c: use l2c_write_sec() for restoring latency and filter regs
Date: Mon, 5 Jan 2015 08:22:14 -0800 [thread overview]
Message-ID: <20150105162214.GB4081@atomide.com> (raw)
In-Reply-To: <1420460348-20302-3-git-send-email-m.szyprowski@samsung.com>
* Marek Szyprowski <m.szyprowski@samsung•com> [150105 04:22]:
> All four register for latency and filter settings cannot be written in
> non-secure mode and they should go through l2c_write_sec(). More on this
> can be found in CoreLink Level 2 Cache Controller L2C-310 Technical
> Reference Manual, 3.2. Register summary, table 3.1. This have been checked
> the TRM for r3p3, but it should be uniform for all revisions.
>
> Reported-by: Nishanth Menon <nm@ti•com>
> Suggested-by: Tomasz Figa <tomasz.figa@gmail•com>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung•com>
Acked-by: Tony Lindgren <tony@atomide•com>
> ---
> arch/arm/mm/cache-l2x0.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
> index 5e65ca8dea62..0aeeaa95c42d 100644
> --- a/arch/arm/mm/cache-l2x0.c
> +++ b/arch/arm/mm/cache-l2x0.c
> @@ -623,14 +623,14 @@ static void l2c310_resume(void)
> unsigned revision;
>
> /* restore pl310 setup */
> - writel_relaxed(l2x0_saved_regs.tag_latency,
> - base + L310_TAG_LATENCY_CTRL);
> - writel_relaxed(l2x0_saved_regs.data_latency,
> - base + L310_DATA_LATENCY_CTRL);
> - writel_relaxed(l2x0_saved_regs.filter_end,
> - base + L310_ADDR_FILTER_END);
> - writel_relaxed(l2x0_saved_regs.filter_start,
> - base + L310_ADDR_FILTER_START);
> + l2c_write_sec(l2x0_saved_regs.tag_latency, base,
> + L310_TAG_LATENCY_CTRL);
> + l2c_write_sec(l2x0_saved_regs.data_latency, base,
> + L310_DATA_LATENCY_CTRL);
> + l2c_write_sec(l2x0_saved_regs.filter_end, base,
> + L310_ADDR_FILTER_END);
> + l2c_write_sec(l2x0_saved_regs.filter_start, base,
> + L310_ADDR_FILTER_START);
>
> revision = readl_relaxed(base + L2X0_CACHE_ID) &
> L2X0_CACHE_ID_RTL_MASK;
> --
> 1.9.2
>
next prev parent reply other threads:[~2015-01-05 16:22 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-05 12:18 [PATCH v11 0/9] Enable L2 cache support on Exynos4210/4x12 SoCs Marek Szyprowski
2015-01-05 12:19 ` [PATCH v11 1/9] ARM: OMAP2+: use common l2cache initialization code Marek Szyprowski
2015-01-05 16:21 ` Tony Lindgren
2015-01-05 20:25 ` Arnd Bergmann
2015-01-07 14:37 ` Tomasz Figa
2015-01-05 12:19 ` [PATCH v11 2/9] ARM: l2c: use l2c_write_sec() for restoring latency and filter regs Marek Szyprowski
2015-01-05 16:22 ` Tony Lindgren [this message]
2015-01-05 17:20 ` Nishanth Menon
2015-01-07 10:47 ` Marek Szyprowski
2015-01-05 12:19 ` [PATCH v11 3/9] ARM: l2c: Refactor the driver to use commit-like interface Marek Szyprowski
2015-01-05 16:23 ` Tony Lindgren
2015-01-05 17:22 ` Nishanth Menon
2015-01-07 11:28 ` Marek Szyprowski
2015-01-05 12:19 ` [PATCH v11 4/9] ARM: l2c: Add interface to ask hypervisor to configure L2C Marek Szyprowski
2015-01-05 16:24 ` Tony Lindgren
2015-01-05 12:19 ` [PATCH v11 5/9] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL Marek Szyprowski
2015-01-05 16:25 ` Tony Lindgren
2015-01-05 12:19 ` [PATCH v11 6/9] ARM: l2c: Add support for overriding prefetch settings Marek Szyprowski
2015-01-05 16:25 ` Tony Lindgren
2015-01-05 12:19 ` [PATCH v11 7/9] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Marek Szyprowski
2015-01-05 12:19 ` [PATCH v11 8/9] ARM: EXYNOS: Add support for non-secure L2X0 resume Marek Szyprowski
2015-01-05 12:19 ` [PATCH v11 9/9] ARM: dts: exynos4: Add nodes for L2 cache controller Marek Szyprowski
2015-01-05 17:00 ` [PATCH v11 0/9] Enable L2 cache support on Exynos4210/4x12 SoCs Nishanth Menon
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