From: will.deacon@arm•com (Will Deacon)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 2/3] iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices
Date: Wed, 20 May 2015 18:09:26 +0100 [thread overview]
Message-ID: <20150520170926.GI11498@arm.com> (raw)
In-Reply-To: <20150519152435.GL20611@8bytes.org>
On Tue, May 19, 2015 at 04:24:35PM +0100, Joerg Roedel wrote:
> Hi Will,
Hi Joerg,
> the code looks good overall, I just have some questions below.
Great, thanks for having a look. I'll still need to post a v2 to address
some of the other comments I've had.
> On Fri, May 08, 2015 at 07:00:45PM +0100, Will Deacon wrote:
> > +static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
> > +{
> > + int ret = 0;
> > + struct arm_smmu_device *smmu;
> > + struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> > + struct arm_smmu_group *smmu_group = arm_smmu_group_get(dev);
> > +
> > + if (!smmu_group)
> > + return -ENOENT;
> > +
> > + /* Already attached to a different domain? */
> > + if (smmu_group->domain && smmu_group->domain != smmu_domain)
> > + return -EEXIST;
> > +
> > + smmu = smmu_group->smmu;
> > + mutex_lock(&smmu_domain->init_mutex);
> > +
> > + if (!smmu_domain->smmu) {
> > + smmu_domain->smmu = smmu;
> > + ret = arm_smmu_domain_finalise(domain);
> > + if (ret) {
> > + smmu_domain->smmu = NULL;
> > + goto out_unlock;
> > + }
> > + } else if (smmu_domain->smmu != smmu) {
> > + dev_err(dev,
> > + "cannot attach to SMMU %s (upstream of %s)\n",
> > + dev_name(smmu_domain->smmu->dev),
> > + dev_name(smmu->dev));
> > + ret = -ENXIO;
> > + goto out_unlock;
> > + }
>
> This looks like all devices in a domain need to be behind the same SMMU
> device, right?
Yes, that's correct. This matches what we do for the arm-smmu driver
already and is mainly brought about by the potential for hardware
differences between different SMMU instances in the same SoC.
> > + /* Page sizes */
> > + if (reg & IDR5_GRAN64K)
> > + pgsize_bitmap |= SZ_64K | SZ_512M;
> > + if (reg & IDR5_GRAN16K)
> > + pgsize_bitmap |= SZ_16K | SZ_32M;
> > + if (reg & IDR5_GRAN4K)
> > + pgsize_bitmap |= SZ_4K | SZ_2M | SZ_1G;
> > +
> > + arm_smmu_ops.pgsize_bitmap &= pgsize_bitmap;
>
> So this could effictivly lead to a zero pgsize_bitmap when there are
> SMMUs in the system with support for different page sizes, no?
Indeed, if there is no common page size then we end up not being able to
support any. I tried to resolve this by moving the bitmap out of the
iommu_ops and into the iommu_domain, but you weren't fond of that idea ;)
Will
next prev parent reply other threads:[~2015-05-20 17:09 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-08 18:00 [PATCH 0/3] iommu/arm-smmu: Add driver for ARM SMMUv3 devices Will Deacon
2015-05-08 18:00 ` [PATCH 1/3] Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3 IOMMU Will Deacon
2015-05-08 18:00 ` [PATCH 2/3] iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices Will Deacon
2015-05-12 7:40 ` leizhen
2015-05-12 16:55 ` Will Deacon
2015-05-13 8:33 ` leizhen
2015-05-21 11:25 ` Will Deacon
2015-05-25 2:07 ` leizhen
2015-05-26 16:12 ` Will Deacon
2015-05-27 9:12 ` leizhen
2015-05-19 15:24 ` Joerg Roedel
2015-05-20 17:09 ` Will Deacon [this message]
2015-05-29 6:43 ` Joerg Roedel
2015-05-29 11:35 ` Robin Murphy
2015-05-29 14:40 ` Joerg Roedel
2015-06-01 9:40 ` Will Deacon
2015-06-02 7:39 ` Joerg Roedel
2015-06-02 9:47 ` Will Deacon
2015-06-02 18:43 ` Joerg Roedel
2015-05-08 18:00 ` [PATCH 3/3] drivers/vfio: Allow type-1 IOMMU instantiation on top of an ARM SMMUv3 Will Deacon
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