Subject: [PATCH v5 2/2] dma: Add Xilinx AXI Central Direct Memory Access Engine driver support

From: [email-masked] (Vinod Koul)
Date: Sat, 27 Jun 2015 19:48:58 +0530

On Wed, Jun 24, 2015 at 05:12:12PM +0000, Appana Durga Kedareswara Rao wrote:

Please *fix* you MUA to wrap lines properly

> > > +
> > > +   if (cfg->reset)
> > > +           return xilinx_cdma_chan_reset(chan);
> > Why do you want to reset this externally, that sounds bad to me
> If someone (client driver) want to reset the controller externally. It will be useful right?
And why would they want to do that? There might be some other clients using
other channels, doesnt sound good design to me. What is the motivation
here...

> 
> 
> >
> > > +
> > > +   if (cfg->coalesc <= XILINX_CDMA_COALESCE_MAX) {
> > > +           reg &= ~XILINX_CDMA_XR_COALESCE_MASK;
> > > +           reg |= cfg->coalesc << XILINX_CDMA_COALESCE_SHIFT;
> > > +   }
> > Can you explain what coalesc means here?
> 
> Coalesc means interrupt threshold
> This value is used for setting the interrupt threshold. When IOC (interrupt on complete) interrupt events occur, an internal counter
> Counts down from the Interrupt Threshold setting. When the count reaches zero, an interrupt out is generated by the DMA engine.
> This will be useful in case of SG transfer.
IIUC, on IOC controller will count this threshold and then generate
interrupt out?

> 
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> 
Thats cute!

-- 
~Vinod