From: peterz@infradead•org (Peter Zijlstra)
To: linux-arm-kernel@lists•infradead.org
Subject: FW: Commit 81a43adae3b9 (locking/mutex: Use acquire/release semantics) causing failures on arm64 (ThunderX)
Date: Fri, 11 Dec 2015 09:41:33 +0100 [thread overview]
Message-ID: <20151211084133.GE6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <CA+=Sn1n6e9pLDRVWT1EzDEn2XWwoK-Ep__-R6VVPzhbMvCEdNg@mail.gmail.com>
On Thu, Dec 10, 2015 at 08:51:34PM -0800, Andrew Pinski wrote:
> So looking further I think I understand what is going wrong and why
> c55a6ffa6285e29f874ed403979472631ec70bff is incorrect.
The osq_wait_next() call in osq_lock() is when we fail the lock. This is
effectively trylock() semantics and like for cmpxchg a failed trylock
has no implied barrier semantics. So from that POV osq_wait_next() does
not need to provide ACQUIRE semantics.
In osq_unlock() there's an xchg() in front, which implies full barriers
and thereby provides RELEASE semantics for that part of osq_unlock(), so
again, from this POV osq_wait_next() does not need to provide RELEASE
semantics.
> The compare and swap inside osq_lock needs to be both release and
> acquire semantics memory barriers because the stores (to node) need to
> be visible to the other cores before the setting of lock->tail
> happens.
I'm a wee bit confused on what exactly you mean. Both stores to @node:
1) osq_wait_next(): next = xchg(&node->next, NULL)
2) osq_unlock(): next = xchg(&node->next, NULL)
are xchg() calls which imply full ordering (sequential consistency).
Similarly the store before osq_wait_next() in osq_lock(), namely:
cmpxchg(&prev->node, node, NULL)
is fully ordered.
So I cannot see any store being delayed past the
atomic_cmpxchg_acquire().
Now you mention 'compare and swap inside osq_lock' which I take to be
the latter; and it _is_ fully ordered.
next prev parent reply other threads:[~2015-12-11 8:41 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-10 19:43 Commit 81a43adae3b9 (locking/mutex: Use acquire/release semantics) causing failures on arm64 (ThunderX) David Daney
[not found] ` <SN1PR07MB21577C72379C8440A208D6BC9EEA0@SN1PR07MB2157.namprd07.prod.outlook.com>
2015-12-11 3:29 ` FW: " Andrew Pinski
2015-12-11 4:51 ` Andrew Pinski
2015-12-11 8:41 ` Peter Zijlstra [this message]
2015-12-11 12:04 ` Will Deacon
2015-12-11 12:13 ` Peter Zijlstra
2015-12-11 12:18 ` Will Deacon
2015-12-11 12:26 ` Peter Zijlstra
2015-12-11 13:33 ` Will Deacon
2015-12-11 13:48 ` Peter Zijlstra
2015-12-11 14:06 ` Will Deacon
2015-12-11 17:11 ` Peter Zijlstra
2015-12-11 17:24 ` Will Deacon
2015-12-11 22:35 ` Paul E. McKenney
2015-12-14 20:28 ` Peter Zijlstra
2015-12-15 4:36 ` Paul E. McKenney
2015-12-11 14:17 ` Davidlohr Bueso
2015-12-17 21:52 ` Jeremy Linton
2015-12-11 7:33 ` Peter Zijlstra
2015-12-11 9:59 ` Will Deacon
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