Subject: [PATCH 4/4] drm/sun4i: dotclock: Round to closest clock rate

From: [email-masked] (Maxime Ripard)
Date: Sun, 18 Sep 2016 21:16:48 +0200

Hi,

On Thu, Sep 15, 2016 at 11:14:02PM +0800, Chen-Yu Tsai wrote:
> With display pixel clocks we want to have the closest possible clock
> rate, to minimize timing and refresh rate skews. Whether the actual
> clock rate is higher or lower than the requested rate is less important.
> 
> Also check candidates against the requested rate, rather than the
> ideal parent rate, the varying dividers also influence the difference
> between the requested rate and the rounded rate.
> 
> Signed-off-by: Chen-Yu Tsai <[email-masked]>
> ---
>  drivers/gpu/drm/sun4i/sun4i_dotclock.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
> index 3eb99784f371..d401156490f3 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
> @@ -90,7 +90,8 @@ static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
>  			goto out;
>  		}
>  
> -		if ((rounded < ideal) && (rounded > best_parent)) {
> +		if (abs(rate - rounded / i) <
> +		    abs(rate - best_parent / best_div)) {

I'm not sure what you're trying to do here. Why is the divider involved?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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