Subject: [PATCH v3 2/9] ARM64: dts: meson-gxbb-p200: add the ethernet PHY's reset GPIO

From: [email-masked] (Andrew Lunn)
Date: Fri, 20 Jan 2017 17:18:42 +0100

On Fri, Jan 20, 2017 at 04:22:25PM +0100, Martin Blumenstingl wrote:
> This resets the ethernet PHY during boot to get the PHY into a "clean"
> state.
> While here also specify the phy-handle of the ethmac node to make the
> PHY configuration similar to the one we have on GXL devices. This will
> allow us to specify OF-properties for the PHY itself.
> 
> Signed-off-by: Martin Blumenstingl <[email-masked]>
> ---
>  arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
> index 03e3d76626dd..fa0f84cfeaa9 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
> @@ -51,6 +51,30 @@
>  	model = "Amlogic Meson GXBB P200 Development Board";
>  };
>  
> +&ethmac {
> +	status = "okay";
> +	pinctrl-0 = <&eth_rgmii_pins>;
> +	pinctrl-names = "default";
> +	phy-handle = <&eth_phy0>;
> +	phy-mode = "rgmii";
> +
> +	snps,reset-gpio = <&gpio GPIOZ_14 0>;
> +	snps,reset-delays-us = <0 10000 1000000>;
> +	snps,reset-active-low;
> +
> +	mdio {
> +		compatible = "snps,dwmac-mdio";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		eth_phy0: ethernet-phy at 0 {

Hi Martin

ethernet-phy at 3, because of the reg property.

> +			compatible = "ethernet-phy-id0022.1620",
> +				     "ethernet-phy-ieee802.3-c22";
> +			reg = <3>;

  Andrew