Subject: [PATCH 3/9] clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support

From: [email-masked] (Stephen Boyd)
Date: Mon, 19 Jun 2017 18:55:47 -0700

On 05/15, Dong Aisheng wrote:
> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index a6efbb9..4466cae 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -557,6 +557,11 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw);
>   * @lock:	register lock
>   *
>   * Clock with adjustable fractional divider affecting its output frequency.
> + *
> + * Flags:
> + * CLK_FRAC_DIVIDER_ZERO_BASED - by default the divisor is the value read
> + *	from the register.  If CLK_FRAC_DIVIDER_ZERO_BASED is set then the
> + *	divider is the raw value read from the register plus one.

This should say the numerator and denominator are both the value
read plus one. It isn't clear if it applies to the numerator, or
the denominator, or both.

>   */
>  struct clk_fractional_divider {
>  	struct clk_hw	hw;

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