From: will.deacon@arm•com (Will Deacon)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v10 2/3] arm/syscalls: Check address limit on user-mode return
Date: Wed, 21 Jun 2017 10:08:15 +0100 [thread overview]
Message-ID: <20170621090815.GC3768@arm.com> (raw)
In-Reply-To: <CAJcbSZG8KH7kw5HMP-7HvfHh2RdAfGnOqjOibHr5H42tORRGCw@mail.gmail.com>
On Tue, Jun 20, 2017 at 01:31:14PM -0700, Thomas Garnier wrote:
> On Tue, Jun 20, 2017 at 1:18 PM, Kees Cook <keescook@chromium•org> wrote:
> > On Wed, Jun 14, 2017 at 6:12 PM, Thomas Garnier <thgarnie@google•com> wrote:
> >> diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
> >> index eb5cd77bf1d8..e33c32d56193 100644
> >> --- a/arch/arm/kernel/entry-common.S
> >> +++ b/arch/arm/kernel/entry-common.S
> >> @@ -41,7 +41,9 @@ ret_fast_syscall:
> >> UNWIND(.cantunwind )
> >> disable_irq_notrace @ disable interrupts
> >> ldr r1, [tsk, #TI_FLAGS] @ re-check for syscall tracing
> >> - tst r1, #_TIF_SYSCALL_WORK | _TIF_WORK_MASK
> >> + tst r1, #_TIF_SYSCALL_WORK
> >> + bne fast_work_pending
> >> + tst r1, #_TIF_WORK_MASK
> >
> > (IIUC) MOV32 is 2 cycles (MOVW, MOVT), and each TST above is 1 cycle
> > and each BNE is 1 cycle (when not taken). So:
> >
> > mov32 r2, #_TIF_SYSCALL_WORK | _TIF_WORK_MASK
> > tst r1, r2
> > bne fast_work_pending
> >
> > is 4 cycles and tst, bne, tst, bne is also 4 cycles. Would mov32 be
> > more readable (since it keeps the flags together)?
>
> I guess it would be more readable. Any opinion from the arm folks?
The mov32 sequence is probably better, but statically attributing cycles
on a per instruction basis is pretty futile on modern CPUs.
Will
next prev parent reply other threads:[~2017-06-21 9:08 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-15 1:12 [PATCH v10 1/3] x86/syscalls: Check address limit on user-mode return Thomas Garnier
2017-06-15 1:12 ` [PATCH v10 2/3] arm/syscalls: " Thomas Garnier
2017-06-20 20:18 ` Kees Cook
2017-06-20 20:31 ` Thomas Garnier
2017-06-21 9:08 ` Will Deacon [this message]
2017-07-18 14:36 ` Leonard Crestez
2017-07-18 16:04 ` Thomas Garnier
2017-07-18 17:18 ` Leonard Crestez
2017-07-18 19:04 ` Thomas Garnier
2017-07-19 14:58 ` Leonard Crestez
2017-07-19 16:51 ` Thomas Garnier
2017-07-19 17:06 ` Russell King - ARM Linux
2017-07-19 17:20 ` [kernel-hardening] " Thomas Garnier
2017-07-19 18:35 ` Russell King - ARM Linux
2017-07-19 18:50 ` Thomas Garnier
2017-06-15 1:12 ` [PATCH v10 3/3] arm64/syscalls: " Thomas Garnier
2017-06-21 8:16 ` Catalin Marinas
2017-06-21 13:57 ` Thomas Garnier
2017-06-20 20:24 ` [PATCH v10 1/3] x86/syscalls: " Kees Cook
2017-06-28 17:52 ` Kees Cook
2017-07-06 20:38 ` Thomas Garnier
2017-07-06 20:48 ` Thomas Gleixner
2017-07-06 20:52 ` Thomas Garnier
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