From: thomas.petazzoni@free-electrons•com (Thomas Petazzoni)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH] mmc: sdhci-xenon: Fix clock resource by adding an optional bus clock
Date: Fri, 29 Sep 2017 11:15:50 +0200 [thread overview]
Message-ID: <20170929111550.065e7948@windsurf.lan> (raw)
In-Reply-To: <87fub5hnqb.fsf@free-electrons.com>
Hello,
On Fri, 29 Sep 2017 11:13:00 +0200, Gregory CLEMENT wrote:
> >> - clock-names:
> >> Array of names corresponding to clocks property.
> >> The input clock for Xenon IP core should be named as "core".
> >> + The input clock for the AXI bus must be named as "axi".
> >
> > Is "bus" more suitable?
>
> I find bus too vague.
Actually no, I believe "bus" is more common. Indeed, you could have the
same IP, attached to a different interconnect I guess.
> >> /*
> >> * Link Xenon specific mmc_host_ops function,
> >> @@ -491,9 +493,20 @@ static int xenon_probe(struct platform_device *pdev)
> >> if (err)
> >> goto free_pltfm;
> >>
> >> + priv->axi_clk = devm_clk_get(&pdev->dev, "axi");
> >> + if (IS_ERR(priv->axi_clk)) {
-EPROBE_DEFER handling ?
> >> + err = PTR_ERR(priv->axi_clk);
> >> + dev_err(&pdev->dev, "Failed to setup axi clk: %d\n", err);
> >
> > Since the bus clock is optional, can we remove this err msg?
>
> I will change it in dev_info.
This clock is optional (in order to keep DT backward compatibility), so
there shouldn't be any error message, be it dev_err() or dev_info().
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2017-09-29 9:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-28 15:05 [PATCH] mmc: sdhci-xenon: Fix clock resource by adding an optional bus clock Gregory CLEMENT
2017-09-28 15:57 ` Gregory CLEMENT
2017-09-29 2:39 ` Jisheng Zhang
2017-09-29 9:13 ` Gregory CLEMENT
2017-09-29 9:15 ` Thomas Petazzoni [this message]
2017-09-29 9:22 ` Gregory CLEMENT
2017-09-30 2:47 ` Ziji Hu
2017-09-30 2:56 ` Jisheng Zhang
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