Subject: [PATCH v2 06/23] thermal: armada: convert driver to syscon register accesses

From: [email-masked] (Miquel Raynal)
Date: Thu, 5 Jul 2018 14:43:33 +0200

Hi Eduardo,

Eduardo Valentin <[email-masked]> wrote on Mon, 2 Jul 2018
10:29:19 -0700:

> Miquel,
> 
> On Tue, Jun 26, 2018 at 09:29:31AM +0200, Miquel Raynal wrote:
> > Hi Baruch,
> > 
> > On Tue, 26 Jun 2018 06:37:24 +0300, Baruch Siach <[email-masked]>
> > wrote:
> >   
> > > Hi Miquel,
> > > 
> > > On Mon, Jun 25, 2018 at 05:12:22PM +0200, Miquel Raynal wrote:  
> > > > Until recently, only one register was referenced in MVEBU thermal IP
> > > > node. Recent changes added a second entry pointing to another
> > > > register right next to it. We cannot know for sure that we will not
> > > > have to access other registers. That will be actually the case when
> > > > overheat interrupt feature will come, where it will be needed to access
> > > > DFX registers in the same area.
> > > > 
> > > > This approach is not scalable so intead of adding consinuously memory
> > > > areas in the DT (and change de DT bindings, while keeping backward    
> > > 
> > > s/de/the/  
> > 
> > Oh and s/intead/instead/ too.  
> 
> Can you please fix the minor above and also refresh against linus master
> branch? Patch does not apply clean anymore.

Sure, I'll send a new version rebased on top of Linus's master branch.

Thanks for taking the time to check the series,
Miqu?l