Subject: Re: [PATCH RESEND v1 4/4] dt-bindings: imx8-clock: add a53 and a72 clock id

From: Rob Herring <[email-masked]>
Date: Mon, 21 Jan 2019 18:10:11 -0600

On Fri, Jan 11, 2019 at 11:56:09AM +0000, Aisheng Dong wrote:
> Add a53 and a72 clock id, as there's still no users, we update
> IMX_LSIO_MEM_CLK base to start from 6 to allow a53 and a72 clock
> id to be continued with a35 clk.
> 
> Cc: Stephen Boyd <[email-masked]>
> Cc: Rob Herring <[email-masked]>
> Cc: [email-masked]
> Cc: Shawn Guo <[email-masked]>
> Cc: Sascha Hauer <[email-masked]>
> Cc: Fabio Estevam <[email-masked]>
> Cc: Michael Turquette <[email-masked]>
> Signed-off-by: Dong Aisheng <[email-masked]>
> ---
>  include/dt-bindings/clock/imx8-clock.h | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/include/dt-bindings/clock/imx8-clock.h b/include/dt-bindings/clock/imx8-clock.h
> index 4236818..2f1aa2f 100644
> --- a/include/dt-bindings/clock/imx8-clock.h
> +++ b/include/dt-bindings/clock/imx8-clock.h
> @@ -13,10 +13,12 @@
>  
>  /* CPU */
>  #define IMX_A35_CLK					1
> +#define IMX_A53_CLK					2
> +#define IMX_A72_CLK					3

All 3 cores in one chip? If not maybe these should be split or define 
them as cpu cluster x clocks.

>  
>  /* LSIO SS */
> -#define IMX_LSIO_MEM_CLK				2
> -#define IMX_LSIO_BUS_CLK				3
> +#define IMX_LSIO_MEM_CLK				6
> +#define IMX_LSIO_BUS_CLK				7
>  #define IMX_LSIO_PWM0_CLK				10
>  #define IMX_LSIO_PWM1_CLK				11
>  #define IMX_LSIO_PWM2_CLK				12
> -- 
> 2.7.4
> 

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