Subject: Re: [PATCH v2] ARM: dts: vf610: Add ZII SPB4 board

From: Shawn Guo <[email-masked]>
Date: Thu, 21 Mar 2019 17:03:31 +0800

On Wed, Mar 13, 2019 at 12:02:24AM -0700, Andrey Smirnov wrote:
> Add Device Tree for VF610 based Zodiac Seat Power Box.
> 
> Signed-off-by: Andrey Smirnov <[email-masked]>
> Cc: Shawn Guo <[email-masked]>
> Cc: Chris Healy <[email-masked]>
> Cc: Andrew Lunn <[email-masked]>
> Cc: Heiner Kallweit <[email-masked]>
> Cc: Fabio Estevam <[email-masked]>
> Cc: [email-masked]
> Cc: [email-masked]
> Cc: [email-masked]
> ---
> 
> Changes since [v1]:
> 
>     - Change Makefile diff to keep entries in alphabetical order
>     
>     - Various node name changes
> 
> [v1] lkml.kernel.org/r/[email-masked]
> 
>  arch/arm/boot/dts/Makefile           |   1 +
>  arch/arm/boot/dts/vf610-zii-spb4.dts | 359 +++++++++++++++++++++++++++
>  2 files changed, 360 insertions(+)
>  create mode 100644 arch/arm/boot/dts/vf610-zii-spb4.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index f4f5aeaf3298..efefce8efa05 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -606,6 +606,7 @@ dtb-$(CONFIG_SOC_VF610) += \
>  	vf610-zii-dev-rev-b.dtb \
>  	vf610-zii-dev-rev-c.dtb \
>  	vf610-zii-scu4-aib.dtb \
> +	vf610-zii-spb4.dtb \
>  	vf610-zii-ssmb-dtu.dtb \
>  	vf610-zii-ssmb-spu3.dtb
>  dtb-$(CONFIG_ARCH_MXS) += \
> diff --git a/arch/arm/boot/dts/vf610-zii-spb4.dts b/arch/arm/boot/dts/vf610-zii-spb4.dts
> new file mode 100644
> index 000000000000..3b0c003a9fcf
> --- /dev/null
> +++ b/arch/arm/boot/dts/vf610-zii-spb4.dts
> @@ -0,0 +1,359 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +
> +/*
> + * Device tree file for ZII's SPB4 board
> + *
> + * SPB - Seat Power Box
> + *
> + * Copyright (C) 2019 Zodiac Inflight Innovations
> + */
> +
> +/dts-v1/;
> +#include "vf610.dtsi"
> +
> +/ {
> +	model = "ZII VF610 SPB4 Board";
> +	compatible = "zii,vf610spb4", "zii,vf610dev", "fsl,vf610";

The board compatible needs to be documented in
Documentation/devicetree/bindings/arm/fsl.yaml.  And it should be a
separate patch that needs to be ACKed by DT maintainer.

> +
> +	chosen {
> +		stdout-path = &uart0;
> +	};
> +

<snip>

> +&iomuxc {
> +	pinctrl_dspi1: dspi1grp {
> +		fsl,pins = <
> +			VF610_PAD_PTD5__DSPI1_CS0		0x1182
> +			VF610_PAD_PTD4__DSPI1_CS1		0x1182
> +			VF610_PAD_PTC6__DSPI1_SIN		0x1181
> +			VF610_PAD_PTC7__DSPI1_SOUT		0x1182
> +			VF610_PAD_PTC8__DSPI1_SCK		0x1182
> +		>;
> +	};
> +
> +	pinctrl_esdhc0: esdhc0grp {
> +		fsl,pins = <
> +			VF610_PAD_PTC0__ESDHC0_CLK		0x31ef
> +			VF610_PAD_PTC1__ESDHC0_CMD		0x31ef
> +			VF610_PAD_PTC2__ESDHC0_DAT0		0x31ef
> +			VF610_PAD_PTC3__ESDHC0_DAT1		0x31ef
> +			VF610_PAD_PTC4__ESDHC0_DAT2		0x31ef
> +			VF610_PAD_PTC5__ESDHC0_DAT3		0x31ef
> +			VF610_PAD_PTD23__ESDHC0_DAT4		0x31ef
> +			VF610_PAD_PTD22__ESDHC0_DAT5		0x31ef
> +			VF610_PAD_PTD21__ESDHC0_DAT6		0x31ef
> +			VF610_PAD_PTD20__ESDHC0_DAT7		0x31ef
> +		>;
> +	};
> +
> +	pinctrl_esdhc1: esdhc1grp {
> +		fsl,pins = <
> +			VF610_PAD_PTA24__ESDHC1_CLK		0x31ef
> +			VF610_PAD_PTA25__ESDHC1_CMD		0x31ef
> +			VF610_PAD_PTA26__ESDHC1_DAT0		0x31ef
> +			VF610_PAD_PTA27__ESDHC1_DAT1		0x31ef
> +			VF610_PAD_PTA28__ESDHC1_DATA2		0x31ef
> +			VF610_PAD_PTA29__ESDHC1_DAT3		0x31ef
> +		>;
> +	};
> +
> +	pinctrl_fec1: fec1grp {
> +		fsl,pins = <
> +			VF610_PAD_PTA6__RMII_CLKIN		0x30d1
> +			VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2
> +			VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3
> +			VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1
> +			VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1
> +			VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1
> +			VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1
> +			VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2
> +			VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2
> +			VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2
> +		>;
> +	};
> +
> +	pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
> +		fsl,pins = <
> +			VF610_PAD_PTE2__GPIO_107		0x31c2
> +			VF610_PAD_PTB28__GPIO_98		0x219d
> +		>;
> +	};
> +
> +	pinctrl_i2c0: i2c0grp {
> +		fsl,pins = <
> +			VF610_PAD_PTB14__I2C0_SCL		0x37ff
> +			VF610_PAD_PTB15__I2C0_SDA		0x37ff
> +		>;
> +	};
> +
> +	pinctrl_i2c1: i2c1grp {
> +		fsl,pins = <
> +			VF610_PAD_PTB16__I2C1_SCL		0x37ff
> +			VF610_PAD_PTB17__I2C1_SDA		0x37ff
> +		>;
> +	};
> +
> +	pinctrl_leds_debug: pinctrl-leds-debug {
> +		fsl,pins = <
> +			VF610_PAD_PTD3__GPIO_82			0x31c2
> +		>;
> +	};
> +
> +	pinctrl_uart0: uart0grp {
> +		fsl,pins = <
> +			VF610_PAD_PTB10__UART0_TX		0x21a2
> +			VF610_PAD_PTB11__UART0_RX		0x21a1
> +		>;
> +	};
> +
> +	pinctrl_uart1: uart1grp {
> +		fsl,pins = <
> +			VF610_PAD_PTB23__UART1_TX		0x21a2
> +			VF610_PAD_PTB24__UART1_RX		0x21a1
> +		>;
> +	};
> +
> +	pinctrl_uart2: uart2grp {
> +		fsl,pins = <
> +			VF610_PAD_PTD0__UART2_TX		0x21a2
> +			VF610_PAD_PTD1__UART2_RX		0x21a1
> +		>;
> +	};
> +
> +	pinctrl_uart3: uart3grp {
> +                fsl,pins = <
> +                	VF610_PAD_PTA30__UART3_TX               0x21a2
> +                	VF610_PAD_PTA31__UART3_RX               0x21a1

.git/rebase-apply/patch:388: space before tab in indent.
                	VF610_PAD_PTA30__UART3_TX               0x21a2
.git/rebase-apply/patch:389: space before tab in indent.
                	VF610_PAD_PTA31__UART3_RX               0x21a1
warning: 2 lines add whitespace errors.

Shawn

> +                >;
> +        };
> +};
> -- 
> 2.20.1

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