Subject: Re: [PATCH V12 3/4] arm64: dts: imx8qxp: added ddr performance monitor nodes

From: Shawn Guo <[email-masked]>
Date: Tue, 18 Jun 2019 14:37:02 +0800

On Wed, May 01, 2019 at 06:43:32PM +0000, Frank Li wrote:
> Add ddr performance monitor
> 
> Signed-off-by: Frank Li <[email-masked]>
> Reviewed-by: Fabio Estevam <[email-masked]>

Please resend without using 'Content-Transfer-Encoding: base64'.

Shawn

> ---
> 
> Notes:
>     No change from v9 to v12
> 
>     Change from v8 to v9
>     * put ddr-pmu under ddr_subsystem bus
> 
>     Change from v3 to v8
>     * none
> 
>     Change from v2 to v3
>     * ddr_pmu0 -> ddr-pmu
> 
>  arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 0683ee2..a33e08c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -378,6 +378,20 @@
>  		};
>  	};
>  
> +	ddr_subsyss: bus@5c000000 {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x5c000000 0x0 0x5c000000 0x1000000>;
> +
> +		ddr-pmu@5c020000 {
> +			compatible = "fsl,imx8-ddr-pmu";
> +			reg = <0x5c020000 0x10000>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +	};
> +
>  	lsio_subsys: bus@5d000000 {
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
> -- 
> 2.5.2
> 

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