Subject: Re: [PATCH 21/28] coresight: tmc-etr: alloc_perf_buf: Do not call smp_processor_id from preemptible

From: Greg KH <[email-masked]>
Date: Thu, 20 Jun 2019 08:03:32 +0200

On Wed, Jun 19, 2019 at 01:53:11PM -0600, Mathieu Poirier wrote:
> From: Suzuki K Poulose <[email-masked]>
> 
> During a perf session we try to allocate buffers on the "node" associated
> with the CPU the event is bound to. If it is not bound to a CPU, we
> use the current CPU node, using smp_processor_id(). However this is unsafe
> in a pre-emptible context and could generate the splats as below :
> 
>  BUG: using smp_processor_id() in preemptible [00000000] code: perf/1743
>  caller is tmc_alloc_etr_buffer+0x1bc/0x1f0
>  CPU: 1 PID: 1743 Comm: perf Not tainted 5.1.0-rc6-147786-g116841e #344
>  Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno Development Platform, BIOS EDK II Feb  1 2019
>  Call trace:
>   dump_backtrace+0x0/0x150
>   show_stack+0x14/0x20
>   dump_stack+0x9c/0xc4
>   debug_smp_processor_id+0x10c/0x110
>   tmc_alloc_etr_buffer+0x1bc/0x1f0
>   etm_setup_aux+0x1c4/0x230
>   rb_alloc_aux+0x1b8/0x2b8
>   perf_mmap+0x35c/0x478
>   mmap_region+0x34c/0x4f0
>   do_mmap+0x2d8/0x418
>   vm_mmap_pgoff+0xd0/0xf8
>   ksys_mmap_pgoff+0x88/0xf8
>   __arm64_sys_mmap+0x28/0x38
>   el0_svc_handler+0xd8/0x138
>   el0_svc+0x8/0xc
> 
> Use NUMA_NO_NODE hint instead of using the current node for events
> not bound to CPUs.
> 
> Fixes: 22f429f19c4135d51e9 ("coresight: etm-perf: Add support for ETR backend")
> Cc: Mathieu Poirier <[email-masked]>
> Signed-off-by: Suzuki K Poulose <[email-masked]>
> Signed-off-by: Mathieu Poirier <[email-masked]>

Same here, why isn't this 5.2-final and [email-masked]
material?

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