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From: Xiaowei Bao <xiaowei.bao@nxp•com>
To: bhelgaas@google•com, robh+dt@kernel•org, mark.rutland@arm•com,
	shawnguo@kernel•org, leoyang.li@nxp•com, kishon@ti•com,
	lorenzo.pieralisi@arm•com, arnd@arndb•de,
	gregkh@linuxfoundation•org, minghuan.Lian@nxp•com,
	mingkai.hu@nxp•com, zhiqiang.hou@nxp•com, roy.zang@nxp•com,
	kstewart@linuxfoundation•org, pombredanne@nexb•com,
	shawn.lin@rock-chips•com, linux-pci@vger•kernel.org,
	devicetree@vger•kernel.org, linux-kernel@vger•kernel.org,
	linux-arm-kernel@lists•infradead.org,
	linuxppc-dev@lists•ozlabs.org
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp•com>, Xiaowei Bao <xiaowei.bao@nxp•com>
Subject: [PATCHv3 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes
Date: Tue,  6 Aug 2019 14:15:52 +0800	[thread overview]
Message-ID: <20190806061553.19934-2-xiaowei.bao@nxp.com> (raw)
In-Reply-To: <20190806061553.19934-1-xiaowei.bao@nxp.com>

LS1028a implements 2 PCIe 3.0 controllers.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp•com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp•com>
---
v2:
 - Fix up the legacy INTx allocate failed issue.
v3:
 - no change.

 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 52 ++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index aef5b06..0b542ed 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -503,6 +503,58 @@
 			status = "disabled";
 		};
 
+		pcie@3400000 {
+			compatible = "fsl,ls1028a-pcie";
+			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
+			       0x80 0x00000000 0x0 0x00002000>; /* configuration space */
+			reg-names = "regs", "config";
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
+			interrupt-names = "pme", "aer";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			device_type = "pci";
+			dma-coherent;
+			num-lanes = <4>;
+			bus-range = <0x0 0xff>;
+			ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000   /* downstream I/O */
+				  0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+			msi-parent = <&its>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 7>;
+			interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		pcie@3500000 {
+			compatible = "fsl,ls1028a-pcie";
+			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
+			       0x88 0x00000000 0x0 0x00002000>; /* configuration space */
+			reg-names = "regs", "config";
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "pme", "aer";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			device_type = "pci";
+			dma-coherent;
+			num-lanes = <4>;
+			bus-range = <0x0 0xff>;
+			ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000   /* downstream I/O */
+				  0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+			msi-parent = <&its>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 7>;
+			interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
 		pcie@1f0000000 { /* Integrated Endpoint Root Complex */
 			compatible = "pci-host-ecam-generic";
 			reg = <0x01 0xf0000000 0x0 0x100000>;
-- 
2.9.5


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  reply	other threads:[~2019-08-06  6:26 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-06  6:15 [PATCHv3 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl, ls1028a-pcie" Xiaowei Bao
2019-08-06  6:15 ` Xiaowei Bao [this message]
2019-08-16  4:17   ` [PATCHv3 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes Z.q. Hou
2019-08-06  6:15 ` [PATCHv3 3/3] PCI: layerscape: Add LS1028a support Xiaowei Bao
2019-08-21 19:26 ` [PATCHv3 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl,ls1028a-pcie" Rob Herring

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