From: Yabin Cui <yabinc@google•com>
To: Mathieu Poirier <mathieu.poirier@linaro•org>,
Suzuki K Poulose <suzuki.poulose@arm•com>,
Alexander Shishkin <alexander.shishkin@linux•intel.com>
Cc: Yabin Cui <yabinc@google•com>,
linux-kernel@vger•kernel.org,
linux-arm-kernel@lists•infradead.org
Subject: [PATCH] coresight: tmc-etr: Fix perf_data check.
Date: Fri, 9 Aug 2019 13:23:30 -0700 [thread overview]
Message-ID: <20190809202330.51183-1-yabinc@google.com> (raw)
When tracing etm data of multiple threads on multiple cpus through
perf interface, each cpu has a unique etr_perf_buffer while sharing
the same etr device. There is no guarantee that the last cpu starts
etm tracing also stops last. This makes perf_data check fail.
Fix it by checking etr_buf instead of etr_perf_buffer.
Signed-off-by: Yabin Cui <yabinc@google•com>
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 17006705287a..f466f05afe08 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1484,7 +1484,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
goto out;
}
- if (WARN_ON(drvdata->perf_data != etr_perf)) {
+ if (WARN_ON(drvdata->perf_data != etr_buf)) {
lost = true;
spin_unlock_irqrestore(&drvdata->spinlock, flags);
goto out;
@@ -1556,7 +1556,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
}
etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf);
- drvdata->perf_data = etr_perf;
+ drvdata->perf_data = etr_perf->etr_buf;
/*
* No HW configuration is needed if the sink is already in
--
2.23.0.rc1.153.gdeed80330f-goog
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next reply other threads:[~2019-08-09 20:23 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-09 20:23 Yabin Cui [this message]
2019-08-12 10:45 ` [PATCH] coresight: tmc-etr: Fix perf_data check Suzuki K Poulose
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