Subject: Re: [PATCH 0/3] CP115 pinctrl support

From: Thomas Petazzoni <[email-masked]>
Date: Wed, 14 Aug 2019 14:34:57 +0200

Hello Linus,

On Wed, 14 Aug 2019 10:12:36 +0200
Linus Walleij <[email-masked]> wrote:

> On Wed, Aug 7, 2019 at 2:47 PM Linus Walleij <[email-masked]> wrote:
> > On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <[email-masked]> wrote:
> >  
> > > This is the second batch of changes (out of three) to support the brand
> > > new Marvell CN9130 SoCs which are made of one AP807 and one CP115.
> > >
> > > We add a new compatible (and the relevant support in the pinctrl
> > > driver) before the addition in batch 3/3 of CN9130 SoCs DT using it.  
> >
> > Waiting for review from the Mvebu maintainers.
> >
> > If it takes too long just nudge me, it looks good to me.  
> 
> So if the other MVEBU maintainers don't really look much at MVEBU
> patches anymore while Miquel is working a lot on the platform,
> what about listing Miquel as maintainer under the SoC entry, hm?

Miquel sent his series on August 5, i.e 9 days ago. We're in August, in
the middle of the summer vacations for many people. While it is nice to
see subsystem maintainers who want to get code merged in a timely
fashion, I think it is probably wise to give it some more time for
review in this period of the year.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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