Subject: Re: [PATCH] clk: imx8mn: fix int pll clk gate

From: Stephen Boyd <[email-masked]>
Date: Fri, 16 Aug 2019 11:02:46 -0700

Quoting [email-masked] (2019-08-13 18:53:12)
> From: Peng Fan <[email-masked]>
> 
> To Frac pll, the gate shift is 13, however to Int PLL the gate shift
> is 11.
> 
> Cc: <[email-masked]>
> Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
> Signed-off-by: Peng Fan <[email-masked]>
> Reviewed-by: Jacky Bai <[email-masked]>
> ---

This is a fix for a change in -next. Why is stable Cced?

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