From: Vidya Sagar <vidyas@nvidia•com>
To: <lorenzo.pieralisi@arm•com>, <bhelgaas@google•com>,
<robh+dt@kernel•org>, <thierry.reding@gmail•com>,
<jonathanh@nvidia•com>, <andrew.murray@arm•com>
Cc: devicetree@vger•kernel.org, mmaddireddy@nvidia•com,
kthota@nvidia•com, gustavo.pimentel@synopsys•com,
vidyas@nvidia•com, linux-kernel@vger•kernel.org,
mperttunen@nvidia•com, linux-pci@vger•kernel.org,
linux-tegra@vger•kernel.org, digetx@gmail•com, kishon@ti•com,
linux-arm-kernel@lists•infradead.org, sagar.tv@gmail•com
Subject: [PATCH V3 3/6] PCI: tegra: Add support to configure sideband pins
Date: Wed, 28 Aug 2019 22:58:47 +0530 [thread overview]
Message-ID: <20190828172850.19871-4-vidyas@nvidia.com> (raw)
In-Reply-To: <20190828172850.19871-1-vidyas@nvidia.com>
Add support to configure sideband signal pins when information is present
in respective controller's device-tree node.
Signed-off-by: Vidya Sagar <vidyas@nvidia•com>
---
V3:
* Used 'dev' instead of 'pcie->dev'
V2:
* Addressed review comment from Andrew Murray
* Handled failure case of pinctrl_pm_select_default_state() cleanly
drivers/pci/controller/dwc/pcie-tegra194.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index fc0dbeb31d78..77fa6f70bc96 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1304,8 +1304,13 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
if (ret < 0) {
dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n",
ret);
- pm_runtime_disable(dev);
- return ret;
+ goto fail_pm_get_sync;
+ }
+
+ ret = pinctrl_pm_select_default_state(dev);
+ if (ret < 0) {
+ dev_err(dev, "Failed to configure sideband pins: %d\n", ret);
+ goto fail_pinctrl;
}
tegra_pcie_init_controller(pcie);
@@ -1332,7 +1337,9 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
fail_host_init:
tegra_pcie_deinit_controller(pcie);
+fail_pinctrl:
pm_runtime_put_sync(dev);
+fail_pm_get_sync:
pm_runtime_disable(dev);
return ret;
}
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists•infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-28 17:29 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-28 17:28 [PATCH V3 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform Vidya Sagar
2019-08-28 17:28 ` [PATCH V3 1/6] dt-bindings: PCI: tegra: Add sideband pins configuration entries Vidya Sagar
2019-09-02 10:40 ` Andrew Murray
2019-09-02 11:38 ` Thierry Reding
2019-09-02 13:38 ` Rob Herring
2019-08-28 17:28 ` [PATCH V3 2/6] dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries Vidya Sagar
2019-08-29 12:03 ` Thierry Reding
2019-08-29 15:18 ` Vidya Sagar
2019-08-29 16:41 ` Thierry Reding
2019-09-02 10:41 ` Andrew Murray
2019-09-02 11:38 ` Thierry Reding
2019-09-02 13:38 ` Rob Herring
2019-08-28 17:28 ` Vidya Sagar [this message]
2019-09-02 10:18 ` [PATCH V3 3/6] PCI: tegra: Add support to configure sideband pins Andrew Murray
2019-09-02 11:38 ` Thierry Reding
2019-08-28 17:28 ` [PATCH V3 4/6] PCI: tegra: Add support to enable slot regulators Vidya Sagar
2019-09-02 10:29 ` Andrew Murray
2019-09-02 11:40 ` Thierry Reding
2019-08-28 17:28 ` [PATCH V3 5/6] arm64: tegra: Add configuration for PCIe C5 sideband signals Vidya Sagar
2019-09-02 10:45 ` Andrew Murray
2019-08-28 17:28 ` [PATCH V3 6/6] arm64: tegra: Add PCIe slot supply information in p2972-0000 platform Vidya Sagar
2019-09-02 10:47 ` Andrew Murray
2019-09-05 8:14 ` [PATCH V3 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 " Vidya Sagar
2019-09-05 9:34 ` Lorenzo Pieralisi
2019-09-05 10:50 ` Vidya Sagar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190828172850.19871-4-vidyas@nvidia.com \
--to=vidyas@nvidia$(echo .)com \
--cc=andrew.murray@arm$(echo .)com \
--cc=bhelgaas@google$(echo .)com \
--cc=devicetree@vger$(echo .)kernel.org \
--cc=digetx@gmail$(echo .)com \
--cc=gustavo.pimentel@synopsys$(echo .)com \
--cc=jonathanh@nvidia$(echo .)com \
--cc=kishon@ti$(echo .)com \
--cc=kthota@nvidia$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
--cc=linux-kernel@vger$(echo .)kernel.org \
--cc=linux-pci@vger$(echo .)kernel.org \
--cc=linux-tegra@vger$(echo .)kernel.org \
--cc=lorenzo.pieralisi@arm$(echo .)com \
--cc=mmaddireddy@nvidia$(echo .)com \
--cc=mperttunen@nvidia$(echo .)com \
--cc=robh+dt@kernel$(echo .)org \
--cc=sagar.tv@gmail$(echo .)com \
--cc=thierry.reding@gmail$(echo .)com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox