From: Thierry Reding <thierry.reding@gmail•com>
To: Thierry Reding <thierry.reding@gmail•com>
Cc: linux-tegra@vger•kernel.org, Bitan Biswas <bbiswas@nvidia•com>,
linux-arm-kernel@lists•infradead.org,
Jon Hunter <jonathanh@nvidia•com>
Subject: [PATCH] soc/tegra: pmc: Fix crashes for hierarchical interrupts
Date: Tue, 1 Oct 2019 13:48:29 +0200 [thread overview]
Message-ID: <20191001114829.3385196-1-thierry.reding@gmail.com> (raw)
From: Thierry Reding <treding@nvidia•com>
Interrupts that don't have an associated wake event or GPIO wake events
end up with an associate IRQ chip that is NULL and which causes IRQ code
to crash. This is because we don't implicitly set the parent IRQ chip by
allocating the interrupt at the parent. However, there really isn't a
corresponding interrupt at the parent, so we need to work around this by
setting the special no_irq_chip as the IRQ chip for these interrupts.
Fixes: 19906e6b1667 ("soc/tegra: pmc: Add wake event support")
Signed-off-by: Thierry Reding <treding@nvidia•com>
---
drivers/soc/tegra/pmc.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 9f9c1c677cf4..0447afa970f5 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -1899,6 +1899,20 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq,
event->id,
&pmc->irq, pmc);
+ /*
+ * GPIOs don't have an equivalent interrupt in the
+ * parent controller (GIC). However some code, such
+ * as the one in irq_get_irqchip_state(), require a
+ * valid IRQ chip to be set. Make sure that's the
+ * case by passing NULL here, which will install a
+ * dummy IRQ chip for the interrupt in the parent
+ * domain.
+ */
+ if (domain->parent)
+ irq_domain_set_hwirq_and_chip(domain->parent,
+ virq, 0, NULL,
+ NULL);
+
break;
}
}
@@ -1908,10 +1922,22 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq,
* dummy hardware IRQ number. This is used in the ->irq_set_type()
* and ->irq_set_wake() callbacks to return early for these IRQs.
*/
- if (i == soc->num_wake_events)
+ if (i == soc->num_wake_events) {
err = irq_domain_set_hwirq_and_chip(domain, virq, ULONG_MAX,
&pmc->irq, pmc);
+ /*
+ * Interrupts without a wake event don't have a corresponding
+ * interrupt in the parent controller (GIC). Pass NULL for the
+ * chip here, which causes a dummy IRQ chip to be installed
+ * for the interrupt in the parent domain, to make this
+ * explicit.
+ */
+ if (domain->parent)
+ irq_domain_set_hwirq_and_chip(domain->parent, virq, 0,
+ NULL, NULL);
+ }
+
return err;
}
--
2.23.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists•infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
reply other threads:[~2019-10-01 11:48 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191001114829.3385196-1-thierry.reding@gmail.com \
--to=thierry.reding@gmail$(echo .)com \
--cc=bbiswas@nvidia$(echo .)com \
--cc=jonathanh@nvidia$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
--cc=linux-tegra@vger$(echo .)kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox