Subject: Regression: Cortex-M w/ XIP not booting

From: afzal mohammed <[email-masked]>
Date: Wed, 2 Oct 2019 11:46:37 +0530

Hi Vladimir,

After,

72cd4064fcca "NOMMU: Toggle only bits in EXC_RETURN we are really care of",

the no-MMU Vybrid Cortex-M4 is not booting, relevant logs at the end.

Looks like any Cortex-M with XIP enabled Kernel would have this issue,
i.e. all STM32 Cortex-M baords (STM32 maintainers CC'ed) as well as.

In the above commit, lr value is saved in data section in __v7m_setup,
but the data section is setup only later in __mmap_switched on an XIP
kernel, where it will overwrite the saved value of lr. This causes
reserved EXC_RETURN value resulting in the below.

Reverting the above change fixes the issue.

Regards
afzal

[    0.801928] Run /init as init process
[    0.829364]
[    0.829364] Unhandled exception: IPSR = 00000006 LR = fffffff1
[    0.836750] CPU: 0 PID: 1 Comm: init Not tainted 5.2.0-00002-gb5fa138a4b0d-dirty #41
[    0.844523] Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree)
[    0.851001] PC is at 0x0
[    0.853559] LR is at 0x0
[    0.856127] pc : [<00000000>]    lr : [<00000000>]    psr: 4000000b
[    0.862434] sp : 8e82dff8  ip : 8e82dfe0  fp : 00000000
[    0.867697] r10: 8eb4ae40  r9 : 00000000  r8 : 00000000
[    0.872958] r7 : 00000000  r6 : 00000000  r5 : 00000000  r4 : 00000000
[    0.879523] r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : 00000000
[    0.886076] xPSR: 4000000b
[    0.888836] CPU: 0 PID: 1 Comm: init Not tainted 5.2.0-00002-gb5fa138a4b0d-dirty #41
[    0.896612] Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree)
[    0.903177] [<0f0042d5>] (unwind_backtrace) from [<0f00354f>] (show_stack+0xb/0xc)
[    0.910851] [<0f00354f>] (show_stack) from [<0f003d0f>] (__invalid_entry+0x4b/0x4c)

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