Subject: Re: [PATCH v2 1/2] arm: dts: imx*(colibri|apalis): add missing recovery modes to i2c

From: Shawn Guo <[email-masked]>
Date: Mon, 28 Oct 2019 11:08:12 +0800

On Wed, Oct 16, 2019 at 05:03:41PM +0000, Philippe Schenker wrote:
> This patch adds missing i2c recovery modes and corrects wrongly named
> ones.
> 
> Signed-off-by: Philippe Schenker <[email-masked]>

As a practise, we use 'ARM: ' to prefix i.MX arch/arm/ patches.

I fixed it up and applied both patches.

Shawn

> 
> ---
> 
> Changes in v2:
> - Added scl/sda gpio
> - Added missing recovery mode to i2c2 on imx6qdl-colibri
> 
>  arch/arm/boot/dts/imx6qdl-apalis.dtsi  | 30 +++++++++++++++++++++-----
>  arch/arm/boot/dts/imx6qdl-colibri.dtsi | 18 ++++++++++++----
>  2 files changed, 39 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> index 7c4ad541c3f5..86cad6c9f0f9 100644
> --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> @@ -205,8 +205,11 @@
>  /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
>  &i2c1 {
>  	clock-frequency = <100000>;
> -	pinctrl-names = "default";
> +	pinctrl-names = "default", "gpio";
>  	pinctrl-0 = <&pinctrl_i2c1>;
> +	pinctrl-1 = <&pinctrl_i2c1_gpio>;
> +	scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> +	sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>  	status = "disabled";
>  };
>  
> @@ -216,8 +219,11 @@
>   */
>  &i2c2 {
>  	clock-frequency = <100000>;
> -	pinctrl-names = "default";
> +	pinctrl-names = "default", "gpio";
>  	pinctrl-0 = <&pinctrl_i2c2>;
> +	pinctrl-1 = <&pinctrl_i2c2_gpio>;
> +	scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> +	sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>  	status = "okay";
>  
>  	pmic: pfuze100@8 {
> @@ -372,9 +378,9 @@
>   */
>  &i2c3 {
>  	clock-frequency = <100000>;
> -	pinctrl-names = "default", "recovery";
> +	pinctrl-names = "default", "gpio";
>  	pinctrl-0 = <&pinctrl_i2c3>;
> -	pinctrl-1 = <&pinctrl_i2c3_recovery>;
> +	pinctrl-1 = <&pinctrl_i2c3_gpio>;
>  	scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>  	sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>  	status = "disabled";
> @@ -646,6 +652,13 @@
>  		>;
>  	};
>  
> +	pinctrl_i2c1_gpio: i2c1gpiogrp {
> +		fsl,pins = <
> +			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b8b1
> +			MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b8b1
> +		>;
> +	};
> +
>  	pinctrl_i2c2: i2c2grp {
>  		fsl,pins = <
>  			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> @@ -653,6 +666,13 @@
>  		>;
>  	};
>  
> +	pinctrl_i2c2_gpio: i2c2gpiogrp {
> +		fsl,pins = <
> +			MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
> +			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
> +		>;
> +	};
> +
>  	pinctrl_i2c3: i2c3grp {
>  		fsl,pins = <
>  			MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
> @@ -660,7 +680,7 @@
>  		>;
>  	};
>  
> -	pinctrl_i2c3_recovery: i2c3recoverygrp {
> +	pinctrl_i2c3_gpio: i2c3gpiogrp {
>  		fsl,pins = <
>  			MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1
>  			MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1
> diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> index 019dda6b88ad..8ab9960fc15d 100644
> --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> @@ -166,8 +166,11 @@
>   */
>  &i2c2 {
>  	clock-frequency = <100000>;
> -	pinctrl-names = "default";
> +	pinctrl-names = "default", "gpio";
>  	pinctrl-0 = <&pinctrl_i2c2>;
> +	pinctrl-0 = <&pinctrl_i2c2_gpio>;
> +	scl-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> +	sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>  	status = "okay";
>  
>  	pmic: pfuze100@8 {
> @@ -312,9 +315,9 @@
>   */
>  &i2c3 {
>  	clock-frequency = <100000>;
> -	pinctrl-names = "default", "recovery";
> +	pinctrl-names = "default", "gpio";
>  	pinctrl-0 = <&pinctrl_i2c3>;
> -	pinctrl-1 = <&pinctrl_i2c3_recovery>;
> +	pinctrl-1 = <&pinctrl_i2c3_gpio>;
>  	scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>  	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>  	status = "disabled";
> @@ -509,6 +512,13 @@
>  		>;
>  	};
>  
> +	pinctrl_i2c2_gpio: i2c2grp {
> +		fsl,pins = <
> +			MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
> +			MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
> +		>;
> +	};
> +
>  	pinctrl_i2c3: i2c3grp {
>  		fsl,pins = <
>  			MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
> @@ -516,7 +526,7 @@
>  		>;
>  	};
>  
> -	pinctrl_i2c3_recovery: i2c3recoverygrp {
> +	pinctrl_i2c3_gpio: i2c3gpiogrp {
>  		fsl,pins = <
>  			MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
>  			MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
> -- 
> 2.23.0
> 

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