Subject: Re: [PATCH 35/46] cpufreq: pxa3: move clk register access to clk driver

From: Stephen Boyd <[email-masked]>
Date: Mon, 28 Oct 2019 02:23:26 -0700

Quoting Arnd Bergmann (2019-10-18 08:41:50)
> The driver needs some low-level register access for setting
> the core and bus frequencies. These registers are owned
> by the clk driver, so move the low-level access into that
> driver with a slightly higher-level interface and avoid
> any machine header file dependencies.
> 
> Cc: Michael Turquette <[email-masked]>
> Cc: Stephen Boyd <[email-masked]>
> Cc: "Rafael J. Wysocki" <[email-masked]>
> Cc: Viresh Kumar <[email-masked]>
> Cc: [email-masked]
> Cc: [email-masked]
> Signed-off-by: Arnd Bergmann <[email-masked]>

> diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c
> index 027b78183565..60a0db4f3790 100644
> --- a/drivers/clk/pxa/clk-pxa3xx.c
> +++ b/drivers/clk/pxa/clk-pxa3xx.c
> @@ -16,6 +16,7 @@
>  #include <linux/of.h>
>  #include <linux/soc/pxa/cpu.h>
>  #include <mach/smemc.h>
> +#include <linux/clk/pxa.h>
>  #include <mach/pxa3xx-regs.h>
>  
>  #include <dt-bindings/clock/pxa-clock.h>
> @@ -79,6 +80,21 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info)
>         return (unsigned int)clks[0] / KHz;
>  }
>  
> +void pxa3xx_clk_update_accr(u32 disable, u32 enable, u32 xclkcfg, u32 mask)
> +{
> +       u32 accr = ACCR;
> +
> +       accr &= ~disable;
> +       accr |= enable;
> +
> +       ACCR = accr;
> +       if (xclkcfg)
> +               __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));

It's just a coprocessor instruction though? I don't see what this has to
do with clks that we model in the kernel? Why can't it just be put in
the cpufreq driver that calls it?

> +
> +       while ((ACSR & mask) != (accr & mask))
> +               cpu_relax();
> +}
> +
>  static unsigned long clk_pxa3xx_ac97_get_rate(struct clk_hw *hw,
>                                              unsigned long parent_rate)
>  {

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