Subject: [PATCH for-stable-v4.4 12/53] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support

From: Ard Biesheuvel <[email-masked]>
Date: Tue, 5 Nov 2019 21:58:05 +0100

From: Mark Rutland <[email-masked]>

From: Marc Zyngier <[email-masked]>

commit 6167ec5c9145cdf493722dfd80a5d48bafc4a18a upstream.

A new feature of SMCCC 1.1 is that it offers firmware-based CPU
workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides
BP hardening for CVE-2017-5715.

If the host has some mitigation for this issue, report that
we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the
host workaround on every guest exit.

Tested-by: Ard Biesheuvel <[email-masked]>
Reviewed-by: Christoffer Dall <[email-masked]>
Signed-off-by: Marc Zyngier <[email-masked]>
Signed-off-by: Catalin Marinas <[email-masked]>
[v4.9: account for files moved to virt/ upstream]
Signed-off-by: Mark Rutland <[email-masked]> [v4.9 backport]
Tested-by: Greg Hackmann <[email-masked]>
Signed-off-by: Greg Kroah-Hartman <[email-masked]>
[ardb: restrict to include/linux/arm-smccc.h]
Signed-off-by: Ard Biesheuvel <[email-masked]>
---
 include/linux/arm-smccc.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index dc68aa5a7261..e1ef944ef1da 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -73,6 +73,11 @@
 			   ARM_SMCCC_SMC_32,				\
 			   0, 1)
 
+#define ARM_SMCCC_ARCH_WORKAROUND_1					\
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
+			   ARM_SMCCC_SMC_32,				\
+			   0, 0x8000)
+
 #ifndef __ASSEMBLY__
 
 #include <linux/linkage.h>
-- 
2.17.1

_______________________________________________
linux-arm-kernel mailing list
[email-masked]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel