Subject: Re: [PATCH v2 1/5] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding

From: Stephen Boyd <[email-masked]>
Date: Fri, 08 Nov 2019 14:07:16 -0800

Quoting Martin Blumenstingl (2019-10-27 09:23:24)
> Amlogic Meson8, Meson8b and Meson8m2 SoCs have a DDR clock controller in
> the MMCBUS registers. There is no public documentation on this, but the
> GPL u-boot sources from the Amlogic BSP show that:
> - it uses the same XTAL input as the main clock controller
> - it contains a PLL which seems to be implemented just like the other
>   PLLs in this SoC
> - there is a power-of-two PLL post-divider
> 
> Add the documentation and header file for this DDR clock controller.
> 
> Reviewed-by: Rob Herring <[email-masked]>
> Signed-off-by: Martin Blumenstingl <[email-masked]>
> ---

Acked-by: Stephen Boyd <[email-masked]>

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